Patents by Inventor Akihisa Terano

Akihisa Terano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9530858
    Abstract: Disclosed are an npn-type bipolar transistor as a nitride semiconductor device having good characteristics, and a method of manufacturing the same. A so-called pn epitaxial substrate has a structure wherein an n-type collector layer and a p-type base layer of a three-layer structure are provided over a substrate. The three-layer structure includes first (lower layer side), second, and third (upper layer side) p-type base layers which differ in thickness and p-type impurity concentration. In a partial region inside the second p-type base layer located as an intermediate layer in the p-type base layer of the three-layer structure, an n-type emitter region is formed by ion implantation.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: December 27, 2016
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Akihisa Terano, Tomonobu Tsuchiya, Naoki Kaneda, Tomoyoshi Mishima
  • Publication number: 20160013327
    Abstract: To provide a nitride semiconductor diode that includes conductive layers formed with a two-dimensional electron gas and achieves low on-state resistance characteristics, a high withstand voltage, and low reverse leakage current characteristics, each of the AlGaN layers and the GaN layers in a nitride semiconductor diode including conductive layers of a two-dimensional electron gas that are formed when the AlGaN layers and the GaN layers are alternately stacked has a double-layer structure formed with an undoped layer (upper layer) and an n-type layer (lower layer).
    Type: Application
    Filed: March 8, 2013
    Publication date: January 14, 2016
    Inventors: Akihisa TERANO, Tomonobu TSUCHIYA, Tsukuru OHTOSHI
  • Publication number: 20150179780
    Abstract: Disclosed are an npn-type bipolar transistor as a nitride semiconductor device having good characteristics, and a method of manufacturing the same. A so-called pn epitaxial substrate has a structure wherein an n-type collector layer and a p-type base layer of a three-layer structure are provided over a substrate. The three-layer structure includes first (lower layer side), second, and third (upper layer side) p-type base layers which differ in thickness and p-type impurity concentration. In a partial region inside the second p-type base layer located as an intermediate layer in the p-type base layer of the three-layer structure, an n-type emitter region is formed by ion implantation.
    Type: Application
    Filed: December 24, 2014
    Publication date: June 25, 2015
    Inventors: Akihisa TERANO, Tomonobu TSUCHIYA, Naoki KANEDA, Tomoyoshi MISHIMA
  • Patent number: 9059328
    Abstract: A nitride semiconductor element having a high reverse breakdown voltage and a method of manufacturing the same are provided. A diode (a vertical-type SBD) has an n?-type nitride semiconductor layer (a drift region) formed on an n-type nitride semiconductor substrate, a p-type nitride semiconductor layer formed on the n?-type nitride semiconductor layer, and besides, an anode electrode formed on the p-type nitride semiconductor layer. The p-type nitride semiconductor layer has a relatively-thin first portion and a relatively-thick second portion provided so as to surround the first portion as being in contact with an outer circumference of the first portion. Also, the relatively-thin first portion of the p-type nitride semiconductor layer is formed thinner than the second portion so as to be depleted. The relatively-thick second portion of the p-type nitride semiconductor layer forms a guard ring part.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: June 16, 2015
    Assignee: Hitachi Metals, Ltd.
    Inventors: Akihisa Terano, Kazuhiro Mochizuki, Tomonobu Tsuchiya, Tadayoshi Tsuchiya, Naoki Kaneda, Tomoyoshi Mishima
  • Patent number: 8896027
    Abstract: Disclosed is a high performance nitride semiconductor having a reverse leak current characteristic with two-dimensional electron gas as a conductive layer. A desired impurity is diffused into or a nitride semiconductor to which a desired impurity is added is re-grown on the bottom surface and the side face portion of a recessed portion formed by dry etching using chlorine gas on the upper surface of a nitride semiconductor stacked film to increase resistance of the side face portion of the nitride semiconductor stacked film contacting an anode electrode, reducing the reverse leak current.
    Type: Grant
    Filed: November 24, 2012
    Date of Patent: November 25, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Akihisa Terano, Kazuhiro Mochizuki, Tomonobu Tsuchiya
  • Publication number: 20140117376
    Abstract: A nitride semiconductor element having a high reverse breakdown voltage and a method of manufacturing the same are provided. A diode (a vertical-type SBD) has an n?-type nitride semiconductor layer (a drift region) formed on an n-type nitride semiconductor substrate, a p-type nitride semiconductor layer formed on the n?-type nitride semiconductor layer, and besides, an anode electrode formed on the p-type nitride semiconductor layer. The p-type nitride semiconductor layer has a relatively-thin first portion and a relatively-thick second portion provided so as to surround the first portion as being in contact with an outer circumference of the first portion. Also, the relatively-thin first portion of the p-type nitride semiconductor layer is formed thinner than the second portion so as to be depleted. The relatively-thick second portion of the p-type nitride semiconductor layer forms a guard ring part.
    Type: Application
    Filed: October 29, 2013
    Publication date: May 1, 2014
    Applicant: Hitachi Metals, Ltd.
    Inventors: Akihisa TERANO, Kazuhiro MOCHIZUKI, Tomonobu TSUCHIYA, Tadayoshi TSUCHIYA, Naoki KANEDA, Tomoyoshi MISHIMA
  • Patent number: 8710550
    Abstract: A semiconductor device includes a nitride semiconductor stack having at least two hetero junction bodies where a first nitride semiconductor layer and a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer are disposed, and includes a drain electrode and, a source electrode disposed to the nitride semiconductor stack, and gate electrodes at a position put between the drain electrode and the source electrode and disposed so as to oppose them respectively in which the drain electrode and the source electrode are disposed over the surface or on the lateral side of the nitride semiconductor stack, and the gate electrode has a first gate electrode disposed in the direction of the depth of the nitride semiconductor stack and a second gate electrode disposed in the direction of the depth of the nitride semiconductor at a depth different from the first gate electrode.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: April 29, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigaki, Ryuta Tsuchiya, Kazuhiro Mochizuki, Akihisa Terano
  • Patent number: 8686442
    Abstract: The present invention provides a nitride semiconductor light emitting device having an n-electrode that has an Au face excellent in ohmic contacts to an n-type nitride semiconductor and excellent in mounting properties, and a method of manufacturing the same. The nitride semiconductor light emitting device uses an n-electrode having a three-layer laminate structure that is composed of a first layer containing aluminum nitride and having a thickness not less than 1 nm or less than 5 nm, a second layer containing one or more metals selected from Ti, Zr, Hf, Mo, and Pt, and a third layer made of Au, from the near side of the n-type nitride semiconductor in order of mention. The n-electrode thus formed is then annealed to obtain ohmic contacts to the n-type nitride semiconductor.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: April 1, 2014
    Assignee: Oclaro Japan, Inc.
    Inventors: Akihisa Terano, Aki Takei
  • Patent number: 8598594
    Abstract: In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.
    Type: Grant
    Filed: February 4, 2012
    Date of Patent: December 3, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiro Mochizuki, Takashi Ishigaki, Akihisa Terano, Tomonobu Tsuchiya
  • Patent number: 8476731
    Abstract: In a Schottky electrode formation region on a nitride semiconductor, the total length of junctions of Schottky electrodes and a surface of a nitride semiconductor layer is longer than the perimeter of the Schottky electrode formation region. The total length is preferably 10 times longer than the perimeter. For example, the Schottky electrodes are formed concentrically and circularly.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: July 2, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Akihisa Terano, Kazuhiro Mochizuki, Takashi Ishigaki
  • Publication number: 20120228664
    Abstract: The present invention provides a nitride semiconductor light emitting device having an n-electrode that has an Au face excellent in ohmic contacts to an n-type nitride semiconductor and excellent in mounting properties, and a method of manufacturing the same. The nitride semiconductor light emitting device uses an n-electrode having a three-layer laminate structure that is composed of a first layer containing aluminum nitride and having a thickness not less than 1 nm or less than 5 nm, a second layer containing one or more metals selected from Ti, Zr, Hf, Mo, and Pt, and a third layer made of Au, from the near side of the n-type nitride semiconductor in order of mention. The n-electrode thus formed is then annealed to obtain ohmic contacts to the n-type nitride semiconductor.
    Type: Application
    Filed: May 22, 2012
    Publication date: September 13, 2012
    Inventors: Akihisa TERANO, Aki Takei
  • Publication number: 20120228626
    Abstract: In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.
    Type: Application
    Filed: February 4, 2012
    Publication date: September 13, 2012
    Inventors: Kazuhiro Mochizuki, Takashi Ishigaki, Akihisa Terano, Tomonobu Tsuchiya
  • Publication number: 20120223337
    Abstract: In a Schottky electrode formation region on a nitride semiconductor, the total length of junctions of Schottky electrodes and a surface of a nitride semiconductor layer is longer than the perimeter of the Schottky electrode formation region. The total length is preferably 10 times longer than the perimeter. For example, the Schottky electrodes are formed concentrically and circularly.
    Type: Application
    Filed: January 13, 2012
    Publication date: September 6, 2012
    Inventors: Akihisa TERANO, Kazuhiro MOCHIZUKI, Takashi ISHIGAKI
  • Patent number: 8124432
    Abstract: In an InGaN-based nitride semiconductor optical device having a long wavelength (440 nm or more) equal to or more than that of blue, the increase of a wavelength is realized while suppressing In (Indium) segregation and deterioration of crystallinity. In the manufacture of an InGaN-based nitride semiconductor optical device having an InGaN-based quantum well active layer including an InGaN well layer and an InGaN barrier layer, a step of growing the InGaN barrier layer includes: a first step of adding hydrogen at 1% or more to a gas atmosphere composed of nitrogen and ammonia and growing a GaN layer in the gas atmosphere; and a second step of growing the InGaN barrier layer in a gas atmosphere composed of nitrogen and ammonia.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: February 28, 2012
    Assignee: Opnext Japan, Inc.
    Inventors: Tomonobu Tsuchiya, Shigehisa Tanaka, Akihisa Terano, Kouji Nakahara
  • Patent number: 8000364
    Abstract: The present invention provides a nitride semiconductor light emitting device having an n-type ohmic electrode with an Au face excellent in ohmic contacts and in mounting properties, and a method of manufacturing the same. The device uses an n-type ohmic electrode having a laminate structure that is composed of: a first layer containing Al as a main ingredient and having a thickness not greater than 10 nm or not less than 3 nm; a second layer containing one or more metals selected from Mo and Nb, so as to suppress the upward diffusion of Al; a third layer containing one or more metals selected from Ti and Pt, to suppress the downward diffusion of Al; and a fourth layer being made of Au, from the side in contact with an n-type nitride substrate in order of mention, and after the laminate structure is formed, the n-type ohmic electrode is annealed.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: August 16, 2011
    Assignee: Opnext Japan, Inc.
    Inventors: Aki Takei, Akihisa Terano
  • Patent number: 7822088
    Abstract: A nitride semiconductor light emitting device operating on a low voltage and excelling in reliability and performance is to be provided. It has a multi-layered p-type clad layer of at least two layers of a first p-type clad layer and a second p-type clad layer, wherein the second p-type clad layer contains a p-type impurity in a higher concentration the first p-type clad layer does, has a thickness ranging from 2 to 20 nm, and is formed of AlYGa1-YN whose Al content has a relationship of X?Y to the first p-type clad layer doped with a p-type impurity containing at least an AlXGa1-XN (0<X?0.2) layer, while a p-type ohmic electrode is formed at least over the second p-type clad layer in contact therewith.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: October 26, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Akihisa Terano, Tomonobu Tsuchiya
  • Publication number: 20100150194
    Abstract: In an InGaN-based nitride semiconductor optical device having a long wavelength (440 nm or more) equal to or more than that of blue, the increase of a wavelength is realized while suppressing In (Indium) segregation and deterioration of crystallinity. In the manufacture of an InGaN-based nitride semiconductor optical device having an InGaN-based quantum well active layer including an InGaN well layer and an InGaN barrier layer, a step of growing the InGaN barrier layer includes: a first step of adding hydrogen at 1% or more to a gas atmosphere composed of nitrogen and ammonia and growing a GaN layer in the gas atmosphere; and a second step of growing the InGaN barrier layer in a gas atmosphere composed of nitrogen and ammonia.
    Type: Application
    Filed: December 3, 2009
    Publication date: June 17, 2010
    Applicant: OPNEXT JAPAN, INC.
    Inventors: Tomonobu TSUCHIYA, Shigehisa TANAKA, Akihisa TERANO, Kouji NAKAHARA
  • Patent number: 7738521
    Abstract: A super-lattice structure is used for a portion of a laser device of a self-aligned structure to lower the resistance of the device by utilizing the extension of electric current in the layer, paying attention to the fact that the lateral conduction of high density doping in the super-lattice structure is effective for decreasing the resistance of the laser, in order to lower the operation voltage and increase the power in nitride type wide gap semiconductor devices in which crystals with high carrier density are difficult to obtain and the device resistance is high.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: June 15, 2010
    Assignee: Opnext Japan, Inc.
    Inventors: Shin'ichi Nakatsuka, Tsukuru Ohtoshi, Kazunori Shinoda, Akihisa Terano, Hitoshi Nakamura, Shigehisa Tanaka
  • Patent number: 7596160
    Abstract: A nitride semiconductor laser which features low resistance and high reliability. A buried layer is formed by selective growth and the shape of a p-type cladding layer is inverted trapezoidal so that the resistance of the p-type cladding layer and that of a p-type contact layer are decreased. For long-term reliability of the laser, the buried layer is a high-resistance semi-insulating layer which suppresses increase in leak current.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: September 29, 2009
    Assignee: Opnext Japan, Inc.
    Inventors: Tomonobu Tsuchiya, Shigehisa Tanaka, Akihisa Terano
  • Publication number: 20090206360
    Abstract: The present invention provides a nitride semiconductor light emitting device having an n-electrode that has an Au face excellent in ohmic contacts to an n-type nitride semiconductor and excellent in mounting properties, and a method of manufacturing the same. The nitride semiconductor light emitting device uses an n-electrode having a three-layer laminate structure that is composed of a first layer containing aluminum nitride and having a thickness not less than 1 nm or less than 5 nm, a second layer containing one or more metals selected from Ti, Zr, Hf, Mo, and Pt, and a third layer made of Au, from the near side of the n-type nitride semiconductor in order of mention. The n-electrode thus formed is then annealed to obtain ohmic contacts to the n-type nitride semiconductor.
    Type: Application
    Filed: August 19, 2008
    Publication date: August 20, 2009
    Inventors: Akihisa TERANO, Aki TAKEI