Patents by Inventor Akihisa Terano

Akihisa Terano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090207872
    Abstract: The present invention provides a nitride semiconductor light emitting device having an n-type ohmic electrode with an Au face excellent in ohmic contacts and in mounting properties, and a method of manufacturing the same. The device uses an n-type ohmic electrode having a laminate structure that is composed of: a first layer containing Al as a main ingredient and having a thickness not greater than 10 nm or not less than 3 nm; a second layer containing one or more metals selected from Mo and Nb, so as to suppress the upward diffusion of Al; a third layer containing one or more metals selected from Ti and Pt, to suppress the downward diffusion of Al; and a fourth layer being made of Au, from the side in contact with an n-type nitride substrate in order of mention, and after the laminate structure is formed, the n-type ohmic electrode is annealed.
    Type: Application
    Filed: August 19, 2008
    Publication date: August 20, 2009
    Inventors: Aki Takei, Akihisa Terano
  • Publication number: 20090016397
    Abstract: A nitride semiconductor light emitting device operating on a low voltage and excelling in reliability and performance is to be provided. It has a multi-layered p-type clad layer of at least two layers of a first p-type clad layer and a second p-type clad layer, wherein the second p-type clad layer contains a p-type impurity in a higher concentration the first p-type clad layer does, has a thickness ranging from 2 to 20 nm, and is formed of AlYGa1-YN whose Al content has a relationship of X?Y to the first p-type clad layer doped with a p-type impurity containing at least an AlxGa1-XN (0<X?0.2) layer, while a p-type ohmic electrode is formed at least over the second p-type clad layer in contact therewith.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 15, 2009
    Inventors: Akihisa Terano, Tomonobu Tsuchiya
  • Publication number: 20080247433
    Abstract: A nitride semiconductor laser which features low resistance and high reliability. A buried layer is formed by selective growth and the shape of a p-type cladding layer is inverted trapezoidal so that the resistance of the p-type cladding layer and that of a p-type contact layer are decreased. For long-term reliability of the laser, the buried layer is a high-resistance semi-insulating layer which suppresses increase in leak current.
    Type: Application
    Filed: August 20, 2007
    Publication date: October 9, 2008
    Inventors: Tomonobu Tsuchiya, Shigehisa Tanaka, Akihisa Terano
  • Patent number: 7364929
    Abstract: An object of the present invention is to provide a nitride semiconductor based light-emitting device, which is low in operating voltage reduction and is high in performance, and a manufacturing method thereof. A first metal film is formed on a P-type conductive nitride semiconductor formed on a substrate, and then, a film (WOx) made of tungsten oxide is formed in superimposition, followed by annealing.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: April 29, 2008
    Assignee: Opnext Japan, Inc.
    Inventors: Akihisa Terano, Shigehisa Tanaka
  • Publication number: 20070278075
    Abstract: A capacitance type MEMS device capable of obtaining favorable switching characteristics relative to high frequency signals, a manufacturing method thereof, and a high performance high frequency device mounting the capacitance type MEMS device are provided. A typical example of the device of the present invention has a conductor layer formed on a dielectric film. The dielectric film is formed on a lower electrode opposed to an upper electrode made of a metal film. The upper electrode vertically moves. The area of a region where the conductor layer formed on the dielectric layer is present in a region where the upper electrode and the lower electrode are opposed is equal to or smaller than the area of the region where the conductor layer formed on the dielectric layer is not present in the opposed region.
    Type: Application
    Filed: July 29, 2004
    Publication date: December 6, 2007
    Inventors: Akihisa Terano, Atsushi Isobe
  • Publication number: 20070224715
    Abstract: An object of the present invention is to provide a nitride semiconductor based light-emitting device, which is low in operating voltage reduction and is high in performance, and a manufacturing method thereof. A first metal film is formed on a P-type conductive nitride semiconductor formed on a substrate, and then, a film (WOX) made of tungsten oxide is formed in superimposition, followed by annealing.
    Type: Application
    Filed: July 26, 2006
    Publication date: September 27, 2007
    Inventors: Akihisa Terano, Shigehisa Tanaka
  • Patent number: 7242273
    Abstract: The MEMS switch comprises a first anchor formed over a substrate, a first spring connected to the first anchor, an upper electrode which is connected to the first spring and makes a motion above the substrate, elastically deforming the first spring, a lower electrode formed over the substrate, positioned under the upper electrode, a second spring connected to the upper electrode, and a second anchor connected to the second spring. When voltage is applied between the upper and lower electrodes and the upper electrode makes a downward motion, the second anchor is brought into contact with the substrate. As a result, the second spring is elastically deformed. When the upper electrode is subsequently brought into contact with the lower electrode, thereby the upper and lower electrodes are electrically connected. The first and second anchors, first and second springs, and upper electrode are formed of identical metal in integral structure.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: July 10, 2007
    Assignee: Hitachi Media Electronics Co., Ltd.
    Inventors: Atsushi Isobe, Akihisa Terano, Kengo Asai, Hiroyuki Uchiyama, Hisanori Matsumoto
  • Publication number: 20070121693
    Abstract: A super-lattice structure is used for a portion of a laser device of a self-aligned structure to lower the resistance of the device by utilizing the extension of electric current in the layer, paying attention to the fact that the lateral conduction of high density doping in the super-lattice structure is effective for decreasing the resistance of the laser, in order to lower the operation voltage and increase the power in nitride type wide gap semiconductor devices in which crystals with high carrier density are difficult to obtain and the device resistance is high.
    Type: Application
    Filed: November 30, 2006
    Publication date: May 31, 2007
    Inventors: Shin'ichi Nakatsuka, Tsukuru Ohtoshi, Kazunori Shinoda, Akihisa Terano, Hitoshi Nakamura, Shigehisa Tanaka
  • Publication number: 20050186117
    Abstract: A gas detection method capable of solving the problem with respect to the operation at normal temperature that was impossible so far in the existent catalyst type sensor and detection with high sensitivity that was impossible by the light absorption type sensor. A multi-layered film formed of a first layer adsorbing a specified gas and a second layer having less adsorption are utilized as a detection film, and the detection film is disposed in the direction perpendicular to the optical channel and optically detects the change of stress caused in the detection film by gas adsorption as coupling loss. Alternatively, the stress generated in the detection film caused by gas adsorption is electrically detected by a piezoelectric element or capacitance element.
    Type: Application
    Filed: August 10, 2004
    Publication date: August 25, 2005
    Inventors: Hiroyuki Uchiyama, Kazuhiro Mochizuki, Akihisa Terano, Teruyuki Nakamura, Akihito Hongo, Tomoyoshi Kumagai
  • Publication number: 20050099252
    Abstract: An inexpensive MEMS switch which stably operates at low voltage and its fabrication method are provided. The switch comprises: a first anchor 7-2-1 formed over a substrate 3; a first spring 7-3-1 connected to the first anchor; an upper electrode 7-1 which is connected to the first spring and makes a motion above the substrate, elastically deforming the first spring; a lower electrode 1 formed over the substrate, positioned under the upper electrode; a second spring 7-3-2 connected to the upper electrode; and a second anchor 7-2-2 connected to the second spring. When voltage is applied to between the upper electrode and the lower electrode and the upper electrode makes a downward motion, the second anchor is brought into contact with the substrate. As a result, the second spring is elastically deformed. When the upper electrode is subsequently brought into contact with the lower electrode, thereby the upper electrode and the lower electrode are electrically connected with each other.
    Type: Application
    Filed: July 30, 2004
    Publication date: May 12, 2005
    Inventors: Atsushi Isobe, Akihisa Terano, Kengo Asai, Hiroyuki Uchiyama, Hisanori Matsumoto
  • Patent number: 6670600
    Abstract: An ultrahigh speed, high sensitivity photodetector, optical module and/or optical transmission device made by reducing the size of a surface illuminated type photodetector to decrease capacitance C. The effective detecting area on a side of the substrate that is opposite to a light incidence side of the substrate in a surface illuminated type photodetector and that is reached by the incident light passing through the semiconductor includes a plurality of ohmic contact areas and a reflector. The reflector may be a laminate comprised of two films in contact with the semiconductor including a transparent film (lower) and a metal film (upper). The size of the ohmic contacts may be small when compared to the wavelength of light incident on the surface of the photodetector. The photodetector may be used in ultrahigh speed, high sensitivity optical modules, semiconductor photo receivers and optical transmission devices with increased transmission capacities.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: December 30, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Akihisa Terano, Yasunobu Matsuoka, Shigehisa Tanaka
  • Publication number: 20030132496
    Abstract: On an In-containing compound semiconductor are sequentially formed Zn (p-type dopant-containing layer), Ta (high-melting metal layer) and a low-resistance conductor layer in this order as a Schottky electrode, and the resulting assemblage is annealed to diffuse Zn into the semiconductor to thereby convert the surface of the semiconductor layer only in a region in contact with the Schottky electrode metal into a p-type layer. The p-type dopant-containing layer can be, instead of Zn, a compound between Zn and an element constituting the In-containing compound semiconductor or a Zn—Ta alloy. The high-melting metal layer can be, instead of Ta, an intermetallic compound between Ta and an element constituting the In-containing compound semiconductor or a Zn—Ta alloy.
    Type: Application
    Filed: November 19, 2002
    Publication date: July 17, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Akihisa Terano, Hiroshi Ohta, Kiyoshi Ouchi, Tomoyoshi Mishima
  • Publication number: 20020135036
    Abstract: An ultrahigh speed, high sensitivity photodetector, optical module and/or optical transmission device made by reducing the size of a surface illuminated type photodetector to decrease capacitance C. The effective detecting area on a side of the substrate that is opposite to a light incidence side of the substrate in a surface illuminated type photodetector and that is reached by the incident light passing through the semiconductor includes a plurality of ohmic contact areas and a reflector. The reflector may be a laminate comprised of two films in contact with the semiconductor including a transparent film (lower) and a metal film (upper). The size of the ohmic contacts may be small when compared to the wavelength of light incident on the surface of the photodetector. The photodetector may be used in ultrahigh speed, high sensitivity optical modules, semiconductor photo receivers and optical transmission devices with increased transmission capacities.
    Type: Application
    Filed: July 17, 2001
    Publication date: September 26, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Akihisa Terano, Yasunobu Matsuoka, Shigehisa Tanaka
  • Patent number: 4902635
    Abstract: This invention is related to the method for production of semiconductor devices suitable for increasing the integration density of semiconductor integrated circuits, especially GaAs semiconductor IC devices.This invention uses no third wiring metal, contact hole or through hole for connection between the Schottky junction and ohmic electrodes formed on the GaAs semiconductor substrate required in the conventional technology, but provides the method for direct connection between the two electrodes stated above by means of vapor deposition, ion implantation, sputtering, CVD, plasma CVD, dry etching and wet etching.Since the application of this invention enables the two electrodes stated above to be directly connected with high yield, the element area at the connecting portion can be reduced to less than half as compared with the same required in the conventional method, the total element area can be reduced greatly.
    Type: Grant
    Filed: March 31, 1988
    Date of Patent: February 20, 1990
    Assignee: The Agency of Industrial Science and Technology
    Inventors: Yoshinori Imamura, Masaru Miyazaki, Akihisa Terano, Nobutoshi Matsunaga, Hiroshi Yanazawa