Patents by Inventor Akihito Takano

Akihito Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040183187
    Abstract: A semiconductor device substrate includes a substrate body having a wiring layer. A base is formed by a material that is different from a material of the substrate body. The base supports the substrate body, and has an opening forming portion where a semiconductor element is mounted. A reinforcing member is larger than the opening forming portion, provided in the substrate body at a portion corresponding to the opening forming portion, and reinforces the substrate body at the portion corresponding to the opening forming portion.
    Type: Application
    Filed: March 15, 2004
    Publication date: September 23, 2004
    Inventors: Tomoo Yamasaki, Akio Rokugawa, Akihito Takano, Kiyoshi Ooi
  • Patent number: 6754952
    Abstract: A process facilitates manufacturing a multiple layer wiring board having therein a thin-film capacitor The process includes: forming a metallic film layer having a barrier metal layer and a metal layer to be sequentially anode oxidized on an insulating layer first conductor pattern; covering a lower electrode forming region of the thin film capacitor in the first conductor pattern with a first resist film; etching to remove an uncovered portion of the metallic film layer; removing the first resist film and covering the first conductor pattern, except for part of the metallic film layer, with a second resist film; forming an anodic oxidation film on the exposed metallic film layer; removing the second resist film and attaching an adherence layer and a metal seed layer, sequentially, on the anodic oxidation film end on the first conductor pattern; and forming an upper electrode second conductor pattern on the anodic oxidation film.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: June 29, 2004
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akihito Takano, Akira Fujisawa, Akio Rokugawa
  • Publication number: 20030094686
    Abstract: A semiconductor device comprises a semiconductor element having an electrode forming surface on which an electrode terminal is formed, an insulating layer made of phenol resin covering the electrode forming surface, and a rewiring pattern connected at one thereof to the electrode terminal and at the other end thereof to an external connecting terminal. During a process for manufacturing the phenol resin is cured at a temperature of 180° C. to 200° C. to form the insulating layer.
    Type: Application
    Filed: November 13, 2002
    Publication date: May 22, 2003
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takahiro Iijima, Akihito Takano, Takaharu Yamano, Takako Yoshihara, Yoshikatsu Seki
  • Publication number: 20030088978
    Abstract: A process is provided for manufacturing a multiple layer wiring board incorporated therein a thin-film capacitor.
    Type: Application
    Filed: November 12, 2002
    Publication date: May 15, 2003
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akihito Takano, Akira Fujisawa, Akio Rokugawa
  • Publication number: 20030058630
    Abstract: A multilayer circuit board for mounting a semiconductor element thereon, comprising a core substrate of a metal material and a plurality of wiring layers stacked on either side of the core substrate, each of the stacked wiring layers being isolated from an adjacent wiring layer by an insulating layer interposed therebetween, the multilayer circuit board having an area at which a heat spreader for dissipating heat generated from the semiconductor element mounted on the circuit board is to be joined to the multilayer circuit board, wherein the multilayer circuit board allows the heat spreader to be joined to the core substrate without the insulating layers being interposed therebetween. A semiconductor device using the multilayer circuit board is also disclosed.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 27, 2003
    Inventors: Akihito Takano, Takahiro Iijima
  • Patent number: 6498714
    Abstract: The present invention relates to a thin film capacitor device having a copper wiring layer, a dielectric layer, and a barrier layer interposed between the wiring layer and the dielectric layer. The barrier layer has the function of preventing diffusion of copper of the wiring layer. The thin film capacitor device may also include an insulating substrate, a planarizing layer, an adhesion layer, and an intermediate layer. The present invention may also relate to a printed circuit substrate having the described thin film capacitor device built therein as a capacitor.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: December 24, 2002
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akira Fujisawa, Akihito Takano, Masayuki Sasaki