Abstract: A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Abstract: There is provided a solid-state imaging element capable of increasing a channel area of a pixel transistor and reducing a parasitic capacitance of a gate.

Abstract: To downsize an imaging element formed by stacking a plurality of semiconductor substrates. The imaging element includes a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes a photoelectric conversion section that performs photoelectric conversion of incident light. The second semiconductor substrate includes a pixel circuit that generates an image signal according to a charge generated by the photoelectric conversion, an element isolating region that isolates elements of the pixel circuit, and a high impurity concentration region which is disposed below the element isolating region and having a high impurity concentration and is connected to the first semiconductor substrate in order to use a reference potential in common, with the first semiconductor substrate being stacked on a back surface side of the second semiconductor substrate.

Abstract: A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Abstract: An effective channel width is expanded. A semiconductor device includes: a semiconductor layer having an active region demarcated by a separation region; and a field-effect transistor in which a pair of main electrode regions sandwiching a channel region are provided in the active region and a gate electrode is provided on the channel region. The active region has a first portion extending in one direction in plan view and a second portion extending from the first portion in a direction crossing the one direction, and the channel region is provided across the first portion and the second portion. One of the pair of main electrode regions is provided in the first region in contact with the channel region, and the other is provided in the second region in contact with the channel region, the pair of main electrode regions being positioned on mutually opposite sides sandwiching the channel region.

Abstract: Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided on the first region of the base; a gate insulating film that is provided on a surface of the gate electrode and the second region of the base; and a semiconductor layer that is provided on a surface of the gate insulating film, wherein the semiconductor layer includes a third region and a fourth region, in the third region, the semiconductor layer and the gate electrode face with a minimum interval, in the fourth region, a distance from the semiconductor layer to the gate electrode is larger than the minimum interval, and at a boundary position between the third region and the fourth region, the semiconductor layer forms a linear shape or a substantially linear shape.

Abstract: Provided is a glycated protein assay reagent containing at least a Trinder reagent, 4-aminoantipyrine, protease, a stabilizer of the protease, and ferrocyanide, wherein at least the Trinder reagent is contained in a Trinder reagent-containing partial composition, at least the 4-aminoantipyrine is contained in a 4-aminoantipyrine-containing partial composition, the stabilizer of the protease is a stabilizer that increases the oxidation-reduction potential of the ferrocyanide above 0.058 V when the stabilizer of the protease and the ferrocyanide are mixed, and the oxidation-reduction potential is an oxidation-reduction potential in a reaction system containing the stabilizer of the protease and the ferrocyanide and not containing glycated protein.

Abstract: A solid-state imaging element according to the present disclosure includes: a first semiconductor substrate that includes a floating diffusion that temporarily holds an electric signal output from a photoelectric conversion element; and a second semiconductor substrate that faces the first semiconductor substrate, in which the second semiconductor substrate includes a first transistor disposed on a side facing the first semiconductor substrate, the first transistor including: a channel extending along a thickness direction of the second semiconductor substrate; and a multi-gate extending along the thickness direction of the second semiconductor substrate and sandwiching the channel, and the multi-gate of the first transistor is connected to the floating diffusion.

Abstract: An imaging device includes a plurality of light-receiving elements arranged in a two-dimensional matrix shape. Each of the light-receiving elements includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion layer has a laminated structure in which a first compound semiconductor layer having a first conductivity type and a second compound semiconductor layer having a second conductivity type that is a reverse conductivity type to the first conductivity type are laminated from a side of the first electrode. The second compound semiconductor layer has been removed in a region between the light-receiving elements. The first electrode and the first compound semiconductor layer are shared by the light-receiving elements. An impurity concentration of a first compound semiconductor layer near the first electrode is lower than that of a first compound semiconductor layer near the second compound semiconductor layer.

Abstract: A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Abstract: The present technology relates to a solid-state image pickup apparatus and electronic equipment that makes it possible to suppress read noise. A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Abstract: The present technology relates to a transistor and a manufacturing method that make it possible to reduce noise. The transistor includes a gate electrode, a source region, and a drain region. The gate electrode is formed on a semiconductor substrate. The source region is formed on a surface of the semiconductor substrate and extended from the gate electrode. The drain region is positioned to oppose the source region and formed on the surface of the semiconductor substrate without being brought into contact with the gate electrode. The source region and the drain region are asymmetrical. The drain region is formed at a position deeper than the source region. At a gate end of the gate electrode, the drain region is formed at a distance from the surface of the semiconductor substrate. The present technology is applicable, for example, to an amplifying transistor.

Abstract: Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided on the first region of the base; a gate insulating film that is provided on a surface of the gate electrode and the second region of the base; and a semiconductor layer that is provided on a surface of the gate insulating film, wherein the semiconductor layer includes a third region and a fourth region, in the third region, the semiconductor layer and the gate electrode face with a minimum interval, in the fourth region, a distance from the semiconductor layer to the gate electrode is larger than the minimum interval, and at a boundary position between the third region and the fourth region, the semiconductor layer forms a linear shape or a substantially linear shape.

Abstract: An imaging device includes a plurality of light-receiving elements arranged in a two-dimensional matrix shape. Each of the light-receiving elements includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion layer has a laminated structure in which a first compound semiconductor layer having a first conductivity type and a second compound semiconductor layer having a second conductivity type that is a reverse conductivity type to the first conductivity type are laminated from a side of the first electrode. The second compound semiconductor layer has been removed in a region between the light-receiving elements. The first electrode and the first compound semiconductor layer are shared by the light-receiving elements. An impurity concentration of a first compound semiconductor layer near the first electrode is lower than that of a first compound semiconductor layer near the second compound semiconductor layer.

Abstract: An imaging device includes a plurality of light-receiving elements arranged in a two-dimensional matrix shape. Each of the light-receiving elements includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion layer has a laminated structure in which a first compound semiconductor layer having a first conductivity type and a second compound semiconductor layer having a second conductivity type that is a reverse conductivity type to the first conductivity type are laminated from a side of the first electrode. The second compound semiconductor layer has been removed in a region between the light-receiving elements. The first electrode and the first compound semiconductor layer are shared by the light-receiving elements. An impurity concentration of a first compound semiconductor layer near the first electrode is lower than that of a first compound semiconductor layer near the second compound semiconductor layer.

Abstract: The present technology relates to a semiconductor device, a manufacturing method of a semiconductor device, a solid-state imaging device, and an electronic device capable of reducing a parasitic capacitance between a gate electrode and source/drain electrodes and reducing a leakage current. The semiconductor device includes a first impurity region formed between element isolation regions on both sides, a gate electrode formed on an upper surface of a semiconductor substrate where the element isolation regions and the first impurity region are formed so that both ends are respectively overlapped with the element isolation regions on both sides and the gate electrode is separated from the first impurity region by a predetermined distance along a planar direction, and a second impurity region formed on the semiconductor substrate between the gate electrode and the first impurity region in plan view as having the same conductivity type as the first impurity region.

Abstract: Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided on the first region of the base; a gate insulating film that is provided on a surface of the gate electrode and the second region of the base; and a semiconductor layer that is provided on a surface of the gate insulating film, wherein the semiconductor layer includes a third region and a fourth region, in the third region, the semiconductor layer and the gate electrode face with a minimum interval, in the fourth region, a distance from the semiconductor layer to the gate electrode is larger than the minimum interval, and at a boundary position between the third region and the fourth region, the semiconductor layer forms a linear shape or a substantially linear shape.

Abstract: The present technology relates to a solid-state image pickup apparatus and electronic equipment that makes it possible to suppress read noise. A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Abstract: The present technology relates to a transistor and a manufacturing method that make it possible to reduce noise. The transistor includes a gate electrode, a source region, and a drain region. The gate electrode is formed on a semiconductor substrate. The source region is formed on a surface of the semiconductor substrate and extended from the gate electrode. The drain region is positioned to oppose the source region and formed on the surface of the semiconductor substrate without being brought into contact with the gate electrode. The source region and the drain region are asymmetrical. The drain region is formed at a position deeper than the source region. At a gate end of the gate electrode, the drain region is formed at a distance from the surface of the semiconductor substrate. The present technology is applicable, for example, to an amplifying transistor.

Abstract: An imaging device includes a plurality of light-receiving elements arranged in a two-dimensional matrix shape. Each of the light-receiving elements includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion layer has a laminated structure in which a first compound semiconductor layer having a first conductivity type and a second compound semiconductor layer having a second conductivity type that is a reverse conductivity type to the first conductivity type are laminated from a side of the first electrode. The second compound semiconductor layer has been removed in a region between the light-receiving elements. The first electrode and the first compound semiconductor layer are shared by the light-receiving elements. An impurity concentration of a first compound semiconductor layer near the first electrode is lower than that of a first compound semiconductor layer near the second compound semiconductor layer.