Abstract: In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of cycles of the reference clock signal. A first phase selector selects one of the multi-phase intermediate clock signals. A second phase selector selects one of the multi-phase clock signals. A latch circuit latches the intermediate clock signal selected by the first phase selector with the clock signal selected by the second phase selector.

Abstract: A lamp unit 18 is provided with a reflecting face 25b for an overhead sign and a light receiving face 28 for the overhead sign. The reflecting face 25b for an overhead sign reflects light from a light source 23a and is provided on an upper side of the light source 23a and rearward from a rear side focal point F of a projector lens 11. The light receiving face 28 for the overhead sign is provided on a front side of a movable shade 30 arranged between the projector lens 11 and the light source 23a. The light receiving face 28 forms overhead sign irradiating light P2 by reflecting light from the reflecting face 25b for the overhead sign to the projector lens 11. Illuminance reducer for reducing a portion of irradiating light is provided at a position of a vicinity of an upper end of the movable shade 30 of the light receiving face 28a for the overhead sign.

Abstract: A projection-type vehicle headlamp includes a lamp body, a front cover forming a lamp housing together with the lamp body, a light projection unit accommodated inside the lamp body, and a cover extending in a forward direction from the light projection unit. A louver is formed on a portion of the cover where light from the light projection unit is irradiated so as to allow irradiated light to pass through the louver.

Abstract: A reference voltage generation circuit of the present invention includes: a band gap reference-type current generation circuit for controlling each of currents flowing through a first current path and a second current path, which are extending from a first node to a second node, to be a predetermined reference current, by utilizing a voltage difference occurring between a pair of transistors or diodes; and a resistive load circuit provided between the second node and a third node.

Abstract: Input transistors have sources which are connected to a first input reference node and gates to which a pair of input signals are input. Input-side voltage relaxing transistors have sources connected to drains of the pair of input transistors and gates connected to a second input reference node. Output-side voltage relaxing transistors have sources connected to output nodes, gates connected to a first output reference node, and drains connected to drains of the input-side voltage relaxing transistors. First and second inverter circuits are in correspondence with the output nodes, and are connected between second and third output reference nodes. Each of the first and second inverter circuits also supplies a voltage at one of the second and third output reference nodes to its corresponding one of the output nodes, depending on a voltage at its non-corresponding one of the output nodes.

Abstract: A transconductor for receiving a differential voltage signal and outputting a differential current signal, includes two transconductors for receiving the differential voltage signal and outputting a single-end current signal. An inversion input terminal of one of the two transconductors is connected with a non-inversion input terminal of the other. The transconductor outputs a current signal output from each of the two transconductors as the differential current signal.

Abstract: A pseudo-image signal producing section produces a pseudo-image signal imitating an actual image signal. An amplitude detection section detects the amplitude of the pseudo-image signal having passed through a complex filter circuit. A filter control section controls an element value control section in the complex filter circuit so as to decrease the detected amplitude. The element value control section performs an element value adjustment so that absolute element values of a pair of elements corresponding to each other in two filter circuits in the complex filter circuit increase/decrease in opposite directions.

Abstract: Input transistors have sources which are connected to a first input reference node and gates to which a pair of input signals are input. Input-side voltage relaxing transistors have sources connected to drains of the pair of input transistors and gates connected to a second input reference node. Output-side voltage relaxing transistors have sources connected to output nodes, gates connected to a first output reference node, and drains connected to drains of the input-side voltage relaxing transistors. First and second inverter circuits are in correspondence with the output nodes, and are connected between second and third output reference nodes. Each of the first and second inverter circuits also supplies a voltage at one of the second and third output reference nodes to its corresponding one of the output nodes, depending on a voltage at its non-corresponding one of the output nodes.

Abstract: In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of cycles of the reference clock signal. A first phase selector selects one of the multi-phase intermediate clock signals. A second phase selector selects one of the multi-phase clock signals. A latch circuit latches the intermediate clock signal selected by the first phase selector with the clock signal selected by the second phase selector.

Abstract: Each of n level shifters (LS0 to LS7) includes an NMOS transistor (Mn1) for receiving any one of n clock signals (P0 to P7) and a PMOS transistor (Mp1) for receiving an output signal from another level shifter. An output signal given to the PMOS transistor (Mp1) included in each of the level shifters (LS0 to LS7) is an output signal of the level shifter which receives the clock signal whose phase delay amount with respect to the clock signal given to the NMOS transistor (Mn1) included in that level shifter is a phase amount X (0°<X<180°). The phase amounts X of the n level shifters (LS0 to LS7) are equal to each other.

Abstract: A current mirror circuit 10 is formed to have a current ratio (a transistor size ratio) of 1:m. As well, respective pairs of nMOS transistors MN1, MN3 and nMOS transistors MN2, MN4 are formed to have a current ratio of 1:m. Two currents output from the current mirror circuit 10 are each distributed to two. The distributed currents flowing in the nMOS transistors MN2, MN4 are added and are then allowed to flow into one resistor R2. Hence, for the resistor R2, only one resistor in which current of double flows suffices when m=1, for example. This effortlessly reduces the necessary resistance to one fourth.

Abstract: A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n second pulse signals partially or wholly overlaps a period during which all of the n first pulse signals are at the low level. Each of n first drive transistors includes a source connected to a ground node, a drain connected to a first node, and a gate receiving a corresponding one of the first pulse signals. Each of n second drive transistors includes a source connected to the ground node, a drain connected to a second node, and a gate receiving a corresponding one of the second pulse signals. A current mirror circuit allows a current corresponding to a current flowing through the second node to flow through the first node.

Abstract: Input transistors have sources which are connected to a first input reference node and gates to which a pair of input signals are input. Input-side voltage relaxing transistors have sources connected to drains of the pair of input transistors and gates connected to a second input reference node. Output-side voltage relaxing transistors have sources connected to output nodes, gates connected to a first output reference node, and drains connected to drains of the input-side voltage relaxing transistors. First and second inverter circuits are in correspondence with the output nodes, and are connected between second and third output reference nodes. Each of the first and second inverter circuits also supplies a voltage at one of the second and third output reference nodes to its corresponding one of the output nodes, depending on a voltage at its non-corresponding one of the output nodes.

Abstract: A vehicular headlamp employing a light-emitting element such as an LED and having an improved projected light pattern. A light-emitting surface of a light-emitting system has a horizontally elongated shape when viewed in a direction orthogonal to the optical axis of the light-emitting system so as to form a light distribution pattern which is enlarged through an optical system mainly in the horizontal direction. Since the projected pattern is obtained by enlarging the horizontally elongated light source image, it is easier to design the light distribution of the lamp in comparison to a case where the light intensity distribution of the light-emitting system is rotationally symmetric.

Abstract: A vehicle headlamp includes a projection lens which is placed on an optical axis extending in a front and rear direction of a vehicle, a light source which is placed behind a rear focal point of the projection lens, a reflector which reflects light emanated directly from the light source in a forward direction and toward the optical axis, and a light-dark boundary forming plate which is placed between the projection lens and the light source. The light-dark boundary forming plate extends rearward and obliquely downward from a vicinity of the rear focal point of the projection lens, and a light-dark boundary forming portion is formed on a front end portion of the light-dark boundary forming plate. The light-dark boundary forming portion shields a part of the light reflected from the reflector and forms a cut-off line of a light distribution pattern.

Abstract: A projection-type vehicle headlamp includes a lamp body, a front cover forming a lamp housing together with the lamp body, a light projection unit accommodated inside the lamp body, and a cover extending in a forward direction from the light projection unit. A louver is formed on a portion of the cover where light from the light projection unit is irradiated so as to allow irradiated light to pass through the louver.

Abstract: A reference voltage generation circuit of the present invention includes: a band gap reference-type current generation circuit for controlling each of currents flowing through a first current path and a second current path, which are extending from a first node to a second node, to be a predetermined reference current, by utilizing a voltage difference occurring between a pair of transistors or diodes; and a resistive load circuit provided between the second node and a third node.

Abstract: A lamp unit 18 is provided with a reflecting face 25b for an overhead sign and a light receiving face 28 for the overhead sign. The reflecting face 25b for an overhead sign reflects light from a light source 23a and is provided on an upper side of the light source 23a and rearward from a rear side focal point F of a projector lens 11. The light receiving face 28 for the overhead sign is provided on a front side of a movable shade 30 arranged between the projector lens 11 and the light source 23a. The light receiving face 28 forms overhead sign irradiating light P2 by reflecting light from the reflecting face 25b for the overhead sign to the projector lens 11. Illuminance reducer for reducing a portion of irradiating light is provided at a position of a vicinity of an upper end of the movable shade 30 of the light receiving face 28a for the overhead sign.

Abstract: A transconductor for receiving a differential voltage signal and outputting a differential current signal, includes two transconductors for receiving the differential voltage signal and outputting a single-end current signal. An inversion input terminal of one of the two transconductors is connected with a non-inversion input terminal of the other. The transconductor outputs a current signal output from each of the two transconductors as the differential current signal.

Abstract: A vehicle headlamp includes a projection lens which is placed on an optical axis extending in a front and rear direction of a vehicle, a light source which is placed behind a rear focal point of the projection lens, a reflector which reflects light emanated directly from the light source in a forward direction and toward the optical axis, and a light-dark boundary forming plate which is placed between the projection lens and the light source. The light-dark boundary forming plate extends rearward and obliquely downward from a vicinity of the rear focal point of the projection lens, and a light-dark boundary forming portion is formed on a front end portion of the light-dark boundary forming plate. The light-dark boundary forming portion shields a part of the light reflected from the reflector and forms a cut-off line of a light distribution pattern.