Patents by Inventor Akinori Shiraishi

Akinori Shiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130121009
    Abstract: A light emitting device is provided with a semiconductor light emitting element and a wavelength conversion portion. The wavelength conversion portion includes an outer peripheral portion between an input surface and an output surface. The outer peripheral portion includes a first inclined part at a side of the input surface and a second inclined part at a side of the output surface. The first inclined part and the second inclined part define a projecting portion that is projected on the outer peripheral portion.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 16, 2013
    Inventors: Yasuaki Tsutsumi, Masanobu Mizuno, Yasutaka Sasaki, Mitsutoshi Higashi, Akinori Shiraishi, Rie Arai
  • Patent number: 8394678
    Abstract: A plurality of chip sealing bodies stacked on a wiring substrate with a connection terminal. The chip sealing body includes a semiconductor chip having a semiconductor integrated circuit, a pad and a conductive connecting material, and a resin sealing the semiconductor chip. The chip sealing body is shaped into a cubic form in which a portion of the conductive connecting material except an end portion located on an external device side and all surfaces of semiconductor chip is sealed by the resin and the end portion of the conductive connecting material located on the external device side is exposed from the cubic form. A conductive bonding wire connects the end portions of the conductive connecting materials and the connection terminal respectively. A resin sealing material seals the plurality of chip sealing bodies, the conductive bonding wire, and the wiring substrate.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: March 12, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Mitsuhiro Aizawa
  • Patent number: 8372691
    Abstract: A method of manufacturing a semiconductor device, includes the steps of: (a) providing a support including a plane having a first region for mounting a chip thereon and a second region provided around the first region; (b) forming an insulating resin layer in a semi-curing state on the plane; (c) forming, on the insulating resin layer, a first opening portion for exposing the first region; (d) fitting a chip in the first opening portion to mount the chip on the first region; and (e) completely curing the insulating resin layer after the step (d).
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: February 12, 2013
    Assignee: Shinko Electric Industries, Co., Ltd.
    Inventor: Akinori Shiraishi
  • Patent number: 8368206
    Abstract: A heat radiation package of the present invention includes a substrate in an upper surface side of which recess portion is provided, embedded wiring portion which is filled in the recess portion of the substrate and on which semiconductor element which generates a heat is mounted, and a heat sink connected to a lower surface side of the substrate. The substrate is made of silicon, ceramics, or insulating resin.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: February 5, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 8350390
    Abstract: A wiring substrate includes a wiring layer, an insulating layer formed on the wiring layer, a connection pad formed on the insulating layer, and a via conductor formed to penetrate the insulating layer, and connecting the wiring layer and the connection pad, wherein the wiring layer located under the connection pad is formed to have via receiving electrode portion whose area is smaller than an area of the connection pad, and a wiring portion separated from the via receiving electrode portion, in an area corresponding to the connection pad, and the via receiving electrode portion is connected to the connection pad via the via conductor.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: January 8, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Masahiro Sunohara, Akinori Shiraishi, Hideaki Sakaguchi
  • Publication number: 20130000955
    Abstract: A wiring board includes a main body, a piercing electrode piercing the main body, a first wiring pattern provided at a first surface side of the main body, the first wiring pattern having a pad being electrically connected to one end of the piercing electrode and being where an electronic component is mounted, and a second wiring pattern provided at a second surface side of the main body, the second surface side being situated at a side opposite to the first surface side, the second wiring pattern having an external connection pad being electrically connected to another end of the piercing electrode. A recess and a resin covering the recess are provided at an external circumferential part of the wiring board to surround the first and second wiring patterns and the piercing electrode, the recess piercing the main body of a part positioned at the external circumferential part.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 3, 2013
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hideaki SAKAGUCHI, Akinori Shiraishi
  • Publication number: 20120327574
    Abstract: At least one embodiment provides an electronic component including: connection electrodes; and flexible electrode terminals connected to the respective connection electrodes so that spaces are formed under the respective flexible electrode terminals, each flexible electrode terminal having a main body and a connection projection provided on a top surface of the main body, each flexible electrode terminal being elastically deformable when receiving pressure.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 27, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hideaki SAKAGUCHI, Akinori Shiraishi
  • Publication number: 20120325529
    Abstract: A wiring board includes a first substrate portion including a first feed-through conductor portion in a vertical direction, a second substrate portion provided on the first substrate portion and including a second feed-through conductor portion in a vertical direction of a corresponding part to the first feed-through conductor portion, and a feed-through electrode including the first feed-through conductor portion and the second feed-through conductor portion.
    Type: Application
    Filed: September 7, 2012
    Publication date: December 27, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hideaki SAKAGUCHI, Akinori SHIRAISHI, Mitsutoshi HIGASHI
  • Patent number: 8314344
    Abstract: A wiring board, includes a substrate main body; a piercing electrode configured to pierce the substrate main body; a first wiring pattern provided at a first surface side of the substrate main body, the first wiring pattern having a pad, the pad being electrically connected to one end part of the piercing electrode, the pad being where an electronic component is mounted; and a second wiring pattern provided at a second surface side of the substrate main body, the second surface side being situated at a side opposite to the first surface side, the second wiring pattern having an outside connection pad, the outside connection pad being electrically connected to another end part of the piercing electrode.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: November 20, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Akinori Shiraishi
  • Patent number: 8304862
    Abstract: A semiconductor package includes: a wiring board; and a semiconductor device which is formed on the wiring board; wherein the semiconductor device includes: a semiconductor chip; and a penetration electrode, one end of which is fixed on one plane of the semiconductor chip, and the other end of which penetrates the semiconductor chip and is fixed on the other plane of the semiconductor chip, the penetration electrode penetrating the semiconductor chip in such a manner that the penetration electrode is not contacted to a wall plane of the semiconductor chip by a space portion formed in the semiconductor chip; and the wiring board and the semiconductor device are electrically connected via the penetration electrode.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 6, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Mitsutoshi Higashi, Akinori Shiraishi, Hideaki Sakaguchi, Masahiro Sunohara
  • Patent number: 8299370
    Abstract: A wiring board includes a first substrate portion including a first feed-through conductor portion in a vertical direction, a second substrate portion provided on the first substrate portion and including a second feed-through conductor portion in a vertical direction of a corresponding part to the first feed-through conductor portion, and a feed-through electrode including the first feed-through conductor portion and the second feed-through conductor portion.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: October 30, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Akinori Shiraishi, Mitsutoshi Higashi
  • Publication number: 20120229157
    Abstract: In one embodiment, a probe card is provided. The probe card includes: a substrate having a first surface and a second surface opposite to the first surface; a through hole formed through the substrate and extending between the first surface and the second surface; an elastic member formed in the through hole to extend to the first surface; a through electrode formed in through hole to extend to the second surface; a first trace on a surface of the elastic member to be electrically connected to the through electrode; and a contact bump on the elastic member via the first trace to be electrically connected to the first trace, wherein the contact bump is electrically connected to an electrode pad formed on a DUT (device under test) when an electrical testing is performed on the DUT using the probe card.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 13, 2012
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori SHIRAISHI, Hideaki SAKAGUCHI, Mitsutoshi HIGASHI
  • Patent number: 8227909
    Abstract: There is provided a method of manufacturing a semiconductor package. The method includes: (a) providing a silicon wafer comprising a first surface and a second surface opposite to the first surface; (b) forming vias through the silicon wafer in its thickness direction; (c) forming wiring patterns on the first surface of the silicon wafer such that the wiring patterns are electrically connected to the vias; (d) bonding a MEMS element wafer comprising MEMS elements onto the second surface of the silicon wafer such that the MEMS elements are electrically connected to the vias; (e) dividing the MEMS element wafer into the respective MEMS elements; (f) bonding a lid having concave portions therein onto the second surface of the silicon wafer such that the respective MEMS elements face a corresponding one of the concave portions; and (g) dicing the lid and the silicon wafer.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: July 24, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Mitsutoshi Higashi, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama
  • Publication number: 20120154918
    Abstract: A frame-attached anti-reflection glass (a cap for optical device) includes a plate-shaped member including an anti-reflection film formed on at least one surface of a plate-shaped glass, and a frame-shaped member made of silicon joined to a peripheral portion on one surface side of the plate-shaped member. The anti-reflection film includes two partial films having different compositions, and one partial film is a light-absorbent film. The two partial films are continuously formed on the plate-shaped glass, and respective surfaces of each partial film are on a level with each other. The plate-shaped glass and the frame-shaped member (silicon) are joined together by anodic bonding.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 21, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Akinori Shiraishi
  • Publication number: 20120128021
    Abstract: A light emitting device includes a light emitting element mounting component, including a cubic package component formed of a silicon member covered with a insulating layer, and the package component including a bottom portion, a sidewall portion provided to stand upright on both ends of the bottom portion respectively, and a backwall portion provided to stand upright on an innermost part of the bottom portion, and the package component in which a cavity is provided in an inner side, and a light emitting element mounted on an inner side surface of the backwall portion of the package component, and including a light emitting surface on an upper end part, wherein a plurality of said light emitting element mounting components are stacked in a depth direction of the cavity to direct toward an identical direction.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 24, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori SHIRAISHI, Mitsutoshi HIGASHI
  • Patent number: 8178957
    Abstract: A method of manufacturing an electronic component device, includes the steps of preparing a wiring substrate, which includes a silicon substrate, a concave portion provided on its upper surface side, a through hole formed to penetrate the silicon substrate on a bottom surface side of the concave portion, an insulating layer formed on the silicon substrate, a penetration electrode constructed by a lower conductor portion formed to a halfway position of a height direction from a bottom portion of the through hole and a connection metal member (indium layer) formed on the lower conductor portion in the through hole, and an electronic component having a terminal metal member (gold bump) on a lower surface side, and softening the connection metal member of the wiring substrate in a heating atmosphere and then sticking the terminal metal member of the electronic component into the connection metal member and connecting thereto.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: May 15, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Mitsutoshi Higashi, Kei Murayama
  • Publication number: 20120086116
    Abstract: An electronic component device includes a substrate, an electrode post made of a metal material, provide to stand on the substrate, and an electronic component whose connection electrode is connected to the electrode post, wherein the connection electrode of the electronic component and the electrode post are joined by an alloy layer including a metal which is different from the metal material of the electrode post.
    Type: Application
    Filed: August 30, 2011
    Publication date: April 12, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuichi TAGUCHI, Akinori Shiraishi, Mitsutoshi Higashi
  • Patent number: 8148738
    Abstract: In a semiconductor device 100, a light emitting element 120 has been mounted on an upper plane of a semiconductor substrate 102. In an impurity diffusion region of the semiconductor substrate 102, a P conducting type of a layer 104, and an N layer 106 have been formed, while an N conducting type impurity is implanted to the P layer 104, and then the implanted impurity is diffused to constitute the N layer 106. A zener diode 108 made of a semiconductor device has been formed by the P layer 104 and the N layer 106.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: April 3, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Mitsutoshi Higashi, Naoyuki Koizumi, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara
  • Publication number: 20120049876
    Abstract: [Problems to be solved] To provide a test-use individual substrate capable of improving testing accuracy and connecting reliability. [Means for solving the Problems] A test-use individual substrate 30 which is used for testing a semiconductor wafer, comprises a main body portion 31, thin portions 321, 322 extending from the main body portion 31 and being relatively thinner than the main body portion, and bumps 33 provided on the thin portions 321, 322. [Selected Drawing] FIG.
    Type: Application
    Filed: August 18, 2011
    Publication date: March 1, 2012
    Applicants: SHINKO ELECTRIC INDUSTRIES CO., LTD., ADVANTEST CORPORATION
    Inventors: Shigeru MATSUMURA, Kohei KATO, Katsushi SUGAI, Koichi SHIROYAMA, Mitsutoshi HIGASHI, Akinori SHIRAISHI, Hideaki SAKAGUCHI
  • Patent number: 8106484
    Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: January 31, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi