Patents by Inventor Akinori Shiraishi

Akinori Shiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8100555
    Abstract: It is a lighting apparatus 10 that has a light emitting element 16, a light emitting element housing 15 having a concave portion 28 that accommodates the light emitting element 16, and an optically transparent member 18 that airproofs a space B formed by the concave portion 28 and transmits light emitted from the light emitting element 16. The concave portion 28 is shaped to become wider toward the optically transparent member 18 from the bottom surface 28A of the concave portion 28. The lighting apparatus 10 is provided with a light shielding member 12 for shielding a part of light emitted from the light emitting element 16 is provided on the optically transparent member 18.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: January 24, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Mitsutoshi Higashii, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Akinori Shiraishi
  • Publication number: 20110272821
    Abstract: A wiring substrate manufactured by thinning a silicon substrate, which is coated by an insulation film, from a lower surface to an upper surface to form a substrate body. The substrate body is etched using a resist, which includes an opening, as a mask and the insulation film as an etching stopper layer to form a through hole and a cover, which covers an opening of the through hole at the upper surface of the substrate body. In a state in which the cover is formed, a functional element is formed on the upper surface of a further insulation film at the upper side of the substrate body. Then, a through electrode is formed in at least the through hole.
    Type: Application
    Filed: May 2, 2011
    Publication date: November 10, 2011
    Inventors: Yuichi TAGUCHI, Akinori Shiraishi
  • Patent number: 8053886
    Abstract: A semiconductor package includes a wiring board and a semiconductor device mounted on the wiring board. At least one penetration hole extends from one surface of the semiconductor chip to an opposite surface of the semiconductor chip. A penetration electrode is situated inside the penetration hole without contacting a wall of the penetration hole. The penetration electrode has one end fixed to the one surface of the semiconductor chip and an opposite end protruding from the opposite surface of the semiconductor chip. A connection terminal is formed on the opposite end of the penetration electrode and electrically connected to the wiring board.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 8, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Mitsutoshi Higashi, Akinori Shiraishi, Hideaki Sakaguchi, Masahiro Sunohara
  • Publication number: 20110260744
    Abstract: A probe card for conducting an electrical test on a test subject includes a substrate body including a first surface, which faces toward the test subject, and a second surface, which is opposite to the first surface. A through electrode extends through the substrate body between the first surface and the second surface. A contact bump is formed in correspondence with the electrode pad and electrically connected to the through electrode. An elastic body is filled in an accommodating portion, which is formed in the substrate body extending from the first surface toward the second surface. The contact bump is formed on the elastic body.
    Type: Application
    Filed: April 19, 2011
    Publication date: October 27, 2011
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Akinori Shiraishi, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Patent number: 8044429
    Abstract: A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: October 25, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Mitsutoshi Higashi, Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama, Naoyuki Koizumi, Hideaki Sakaguchi
  • Patent number: 8039967
    Abstract: A wiring substrate includes a silicon substrate, a through hole formed to penetrate the silicon substrate in a thickness direction, an insulating layer formed on both surfaces and side surfaces of the silicon substrate and an inner surface of the through hole, a penetration electrode formed in the through hole, a wiring layer formed on at least one surface of the silicon substrate and connected to the penetration electrode, and a metal wire terminal connected to the wiring layer and formed to extend from one surface of the silicon substrate to a side surface thereof. The metal wire terminal on the side surface of the electronic device is connected to the mounting substrate such that a substrate direction of the electronic device in which an electronic component is mounted on the wiring substrate intersects orthogonally with a substrate direction of the mounting substrate.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: October 18, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Mitsutoshi Higashi
  • Publication number: 20110227218
    Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.
    Type: Application
    Filed: May 26, 2011
    Publication date: September 22, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 8017443
    Abstract: A light transmissive cover for a device comprising: a cover member of light transmissive material; and a junction member joined to the cover member, the junction member being a member used to be joined to the body of the device and having a light interrupting film on the inner surface thereof. A device provided with a light transmissive cover, the device being provided with a cover member of light transmissive material joined to the body of device via a junction member so as to cover at least a part of the device, and having a light interrupting film on the inner surface of the junction member is also disclosed. In addition, methods for manufacturing them disclosed.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: September 13, 2011
    Assignee: Shinko Electric Industries Co., Ltd
    Inventor: Akinori Shiraishi
  • Patent number: 7989927
    Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: August 2, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7981798
    Abstract: The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to cover the first surface of the silicon substrate, surfaces of the silicon substrate exposed from the through holes, and a second surface of the silicon substrate opposite to the first surface; (c) forming an opening in a portion of the first insulating film provided on the second surface, the portion of the first insulating film corresponding to an area in which the through holes are formed; (d) etching the silicon substrate using the first insulating film provided on the second surface as a mask, thereby forming a cavity in the silicon substrate; and (e) removing the first insulating film.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 19, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20110156242
    Abstract: There is provided a method of manufacturing a semiconductor package. The method includes: (a) providing a silicon wafer comprising a first surface and a second surface opposite to the first surface; (b) forming vias through the silicon wafer in its thickness direction; (c) forming wiring patterns on the first surface of the silicon wafer such that the wiring patterns are electrically connected to the vias; (d) bonding a MEMS element wafer comprising MEMS elements onto the second surface of the silicon wafer such that the MEMS elements are electrically connected to the vias; (e) dividing the MEMS element wafer into the respective MEMS elements; (f) bonding a lid having concave portions therein onto the second surface of the silicon wafer such that the respective MEMS elements face a corresponding one of the concave portions; and (g) dicing the lid and the silicon wafer.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 30, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hideaki Sakaguchi, Mitsutoshi Higashi, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama
  • Publication number: 20110147951
    Abstract: A wiring substrate includes a wiring layer, an insulating layer formed on the wiring layer, a connection pad formed on the insulating layer, and a via conductor formed to penetrate the insulating layer, and connecting the wiring layer and the connection pad, wherein the wiring layer located under the connection pad is formed to have via receiving electrode portion whose area is smaller than an area of the connection pad, and a wiring portion separated from the via receiving electrode portion, in an area corresponding to the connection pad, and the via receiving electrode portion is connected to the connection pad via the via conductor.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 23, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei MURAYAMA, Masahiro Sunohara, Akinori Shiraishi, Hideaki Sakaguchi
  • Publication number: 20110150405
    Abstract: A method for manufacturing an optical waveguide which includes a core configured to transmit an optical signal, and a mirror portion configured to reflect the optical signal, the method includes: forming a mask layer patterned in a predetermined shape, on a first crystal plane of a substrate made of a crystalline material; etching the first crystal plane by a wet-etching using the mask layer to form a groove having a plurality of crystal planes; providing a metallic reflection film on at least one of the plurality of crystal planes to form the mirror portion; and providing the groove with a core material to form the core.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 23, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori SHIRAISHI, Yuichi Taguchi
  • Patent number: 7960820
    Abstract: A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: June 14, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7948092
    Abstract: A method of manufacturing an electronic component includes the steps of: a) forming via holes penetrating through a first semiconductor substrate and a second semiconductor substrate which are bonded together by way of a connection layer; b) pattern-etching the second semiconductor substrate using the connection layer as an etch-stop layer to form trenches communicated with the via holes; and c) integrally forming first via plugs buried in the via holes and pattern wirings buried in the trenches through plating.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: May 24, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7897510
    Abstract: A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: March 1, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Yuichi Taguchi, Naoyuki Koizumi, Mitsutoshi Higashi
  • Patent number: 7894201
    Abstract: A method of manufacturing an electronic component includes the steps of a) forming a plurality of wiring boards that include first through holes penetrating through a semiconductor substrate and conductive material buried in the first through holes; b) providing conductive projections on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: February 22, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7888953
    Abstract: A probe card is disclosed that includes a board having a first surface and a second surface facing away from each other and a through hole formed between the first and second surfaces; and a probe needle having a penetration part and a support part. The penetration part is placed in the through hole without contacting the board and projects from the first and second surfaces of the board. The support part is integrated with a first one of the end portions of the penetration part and connected to one of the first and second surfaces of the board. The support part has a spring characteristic. The penetration part is configured to have a second one of its end portions come into contact with an electrode pad of a semiconductor chip at the time of conducting an electrical test on the semiconductor chip.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: February 15, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi
  • Publication number: 20110032710
    Abstract: A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.
    Type: Application
    Filed: October 19, 2010
    Publication date: February 10, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Mitsutoshi Higashi, Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama, Naoyuki Koizumi, Hideaki Sakaguchi
  • Patent number: 7884632
    Abstract: In a semiconductor inspecting device having a contact to be electrically connected to an electrode pad formed in a semiconductor device which is an object to be measured, and a substrate provided with the contact, the contact is provided obliquely to a main surface of the substrate.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: February 8, 2011
    Assignee: Shinko Electric Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Mitsutoshi Higashi, Kei Murayama, Katsunori Yamagishi, Mitsuhiro Aizawa