Patents by Inventor Akio Itoh
Akio Itoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9200188Abstract: The present invention relates to an ester for refrigerator oils having less remaining by-products in the ester and having high thermal stability, and a method for producing the ester for refrigerator oils. The ester for refrigerator oils is obtained by treating a crude ester product, which is obtained by reacting a neopentyl polyol having a carbon number of 5 to 10 with an aliphatic carboxylic acid having a carbon number of 4 to 12, with one or more kinds of salts selected from the group consisting of sulfite, bisulfite, and pyrosulfite.Type: GrantFiled: April 25, 2013Date of Patent: December 1, 2015Assignee: NOF CORPORATIONInventors: Akio Itoh, Takeshi Kajiki
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Publication number: 20150137025Abstract: The present invention relates to an ester for refrigerator oils having less remaining by-products in the ester and having high thermal stability, and a method for producing the ester for refrigerator oils. The ester for refrigerator oils is obtained by treating a crude ester product, which is obtained by reacting a neopentyl polyol having a carbon number of 5 to 10 with an aliphatic carboxylic acid having a carbon number of 4 to 12, with one or more kinds of salts selected from the group consisting of sulfite, bisulfite, and pyrosulfite.Type: ApplicationFiled: April 25, 2013Publication date: May 21, 2015Inventors: Akio Itoh, Takeshi Kajiki
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Publication number: 20100230299Abstract: The hydrogen storage alloy has, as a main phase thereof, a bcc structure phase having a composition represented by TixCryVzXw wherein 3/2?y/x?3/1, 50?z?75 mol %, 0?w?5 mol %, and x+y+z+w=100 mol %, and X represents any one or more selected from Al, Si, and Fe. The hydrogen storage device is a device using the alloy. The preparation process of a hydrogen storage alloy includes the steps of: melting/casting raw materials mixed to give the composition represented by TixCryVzXw; heat-treating an ingot obtained in the melting/casting step; and subjecting the heat-treated ingot to a hydrogen storing/releasing treatment at least once to activate the ingot.Type: ApplicationFiled: March 5, 2010Publication date: September 16, 2010Applicant: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHOInventors: Masakazu Aoki, Shinichi Towata, Tatsuo Noritake, Akio Itoh, Kota Washio, Mamoru Ishikiriyama
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Patent number: 7678646Abstract: To provide a semiconductor device capable of improving accuracy in finishing a hole in which a conductive plug right under a capacitor, and a manufacturing method of such a semiconductor device comprising the following steps: a step of forming first and second conductive plugs 32a, 32b in first and second holes 11a, 11b in a first insulating film 11; a step of forming a first opening 14a in an oxidation preventing insulating film 14; a step of forming an auxiliary conductive plug 36a in the first opening 14a; a step of forming a capacitor Q on the auxiliary conductive plug 36a; a step of forming third and fourth holes 41a, 41b in a second insulating film 41 covering the capacitor Q; a step of forming the second opening 14b in the oxidation preventing insulating film 14 under the fourth hole 41b; a step of forming a third conductive plug 47a in the third hole 41a; and a step of forming a fourth conductive plug 47b in the third hole 41a.Type: GrantFiled: January 6, 2006Date of Patent: March 16, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Akio Itoh, Naoya Sashida
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Publication number: 20070114590Abstract: There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.Type: ApplicationFiled: January 10, 2007Publication date: May 24, 2007Applicant: FUJITSU LIMITEDInventors: Takashi Ando, Jiro Miura, Yukinobu Hirosaka, Akio Itoh, Junichi Watanabe, Kenkichi Suezawa
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Patent number: 7221015Abstract: There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.Type: GrantFiled: March 17, 2003Date of Patent: May 22, 2007Assignee: Fujitsu LimitedInventors: Takashi Ando, Jiro Miura, Yukinobu Hikosaka, Akio Itoh, Junichi Watanabe, Kenkichi Suezawa
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Publication number: 20070032015Abstract: To provide a semiconductor device capable of improving accuracy in finishing a hole in which a conductive plug right under a capacitor, and a manufacturing method of such a semiconductor device comprising the following steps: a step of forming first and second conductive plugs 32a, 32b in first and second holes 11a, 11b in a first insulating film 11; a step of forming a first opening 14a in an oxidation preventing insulating film 14; a step of forming an auxiliary conductive plug 36a in the first opening 14a; a step of forming a capacitor Q on the auxiliary conductive plug 36a; a step of forming third and fourth holes 41a, 41b in a second insulating film 41 covering the capacitor Q; a step of forming the second opening 14b in the oxidation preventing insulating film 14 under the fourth hole 41b; a step of forming a third conductive plug 47a in the third hole 41a; and a step of forming a fourth conductive plug 47b in the third hole 41a.Type: ApplicationFiled: January 6, 2006Publication date: February 8, 2007Applicant: FUJITSU LIMITEDInventors: Akio Itoh, Naoya Sashida
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Patent number: 7074625Abstract: There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of ferroelectric material or high-dielectric material, and a lower electrode on a semiconductor substrate, then forming an interlayer insulating film on the capacitor, then planarizing a surface of the interlayer insulating film by the CMP polishing, then removing a moisture attached to a surface of the interlayer insulating film or a moisture contained in the interlayer insulating film by applying the plasma annealing using an N2O gas, and then forming a redeposited interlayer film on the interlayer insulating film.Type: GrantFiled: September 23, 2004Date of Patent: July 11, 2006Assignee: Fujitsu LimitedInventor: Akio Itoh
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Patent number: 7026058Abstract: A multilayered hydrogen absorbing body is provided which is formed by laminating at least two types of hydrogen absorbing materials. The degrees of strains cause due to absorption/desorption of hydrogen are different between the hydrogen absorbing materials adjacent to each other.Type: GrantFiled: July 22, 2003Date of Patent: April 11, 2006Assignee: Toyota Jidosha Kabushiki KaishaInventors: Shin-ichi Towata, Masakazu Aoki, Tatsumi Hioki, Akio Itoh, Akihiko Koiwai, Toshihiro Mouri, Katsushi Saito
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Patent number: 6930344Abstract: A nonvolatile semiconductor memory device includes a substrate, a plurality of transistors formed on the substrate to constitute a latch, a plate line, and a pair of capacitors each including a lower electrode, a ferroelectric film, and an upper electrode, the pair of capacitors being provided in a layer situated above the substrate and below a metal wiring layer in which the plate line is formed.Type: GrantFiled: December 17, 2003Date of Patent: August 16, 2005Assignee: Fujitsu LimitedInventors: Wataru Yokozeki, Akio Itoh
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Patent number: 6911686Abstract: There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of ferroelectric material or high-dielectric material, and a lower electrode on a semiconductor substrate, then forming an interlayer insulating film on the capacitor, then planarizing a surface of the interlayer insulating film by the CMP polishing, then removing a moisture attached to a surface of the interlayer insulating film or a moisture contained in the interlayer insulating film by applying the plasma annealing using an N2O gas, and then forming a redeposited interlayer film on the interlayer insulating film.Type: GrantFiled: June 15, 2000Date of Patent: June 28, 2005Assignee: Fujitsu LimitedInventor: Akio Itoh
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Publication number: 20050037569Abstract: There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of ferroelectric material or high-dielectric material, and a lower electrode on a semiconductor substrate, then forming an interlayer insulating film on the capacitor, then planarizing a surface of the interlayer insulating film by the CMP polishing, then removing a moisture attached to a surface of the interlayer insulating film or a moisture contained in the interlayer insulating film by applying the plasma annealing using an N2O gas, and then forming a redeposited interlayer film on the interlayer insulating film.Type: ApplicationFiled: September 23, 2004Publication date: February 17, 2005Applicant: Fujitsu LimitedInventor: Akio Itoh
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Publication number: 20040173830Abstract: A nonvolatile semiconductor memory device includes a substrate, a plurality of transistors formed on the substrate to constitute a latch, a plate line, and a pair of capacitors each including a lower electrode, a ferroelectric film, and an upper electrode, the pair of capacitors being provided in a layer situated above the substrate and below a metal wiring layer in which the plate line is formed.Type: ApplicationFiled: December 17, 2003Publication date: September 9, 2004Inventors: Wataru Yokozeki, Akio Itoh
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Publication number: 20040110023Abstract: A multilayered hydrogen absorbing body is provided which is formed by laminating at least two types of hydrogen absorbing materials. The degrees of strains cause due to absorption/desorption of hydrogen are different between the hydrogen absorbing materials adjacent to each other.Type: ApplicationFiled: July 22, 2003Publication date: June 10, 2004Applicant: Toyota Jidosha Kabushiki KaishaInventors: Shin-Ichi Towata, Masakazu Aoki, Tatsumi Hioki, Akio Itoh, Akihiko Koiwai, Toshihiro Mouri, Katsushi Saito
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Patent number: 6710422Abstract: A semiconductor device having conductive plug for connecting capacitor and conductive pattern, comprises first and second impurity diffusion regions formed in a semiconductor substrate, a first insulating film formed over the semiconductor substrate, a first hole formed in the first insulating film on the first impurity diffusion region, a first conductive plug formed in the first hole and made of a metal film, a second hole formed in the first insulating film on the second impurity diffusion region, a second conductive plug formed in the second hole and made of conductive material that is hard to be oxidized rather than the metal film, and a capacitor that consists of a lower electrode connected to an upper surface of the second conductive plug, a dielectric film, and an upper electrode.Type: GrantFiled: August 6, 2002Date of Patent: March 23, 2004Assignee: Fujitsu LimitedInventors: Yukinobu Hikosaka, Akio Itoh, Kazuaki Takai, Takeyasu Saito
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Publication number: 20030227046Abstract: There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.Type: ApplicationFiled: March 17, 2003Publication date: December 11, 2003Inventors: Takashi Ando, Jiro Miura, Yukinobu Hikosaka, Akio Itoh, Junichi Watanabe, Kenkichi Suezawa
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Publication number: 20030127703Abstract: A semiconductor device having conductive plug for connecting capacitor and conductive pattern, comprises first and second impurity diffusion regions formed in a semiconductor substrate, a first insulating film formed over the semiconductor substrate, a first hole formed in the first insulating film on the first impurity diffusion region, a first conductive plug formed in the first hole and made of a metal film, a second hole formed in the first insulating film on the second impurity diffusion region, a second conductive plug formed in the second hole and made of conductive material that is hard to be oxidized rather than the metal film, and a capacitor that consists of a lower electrode connected to an upper surface of the second conductive plug, a dielectric film, and an upper electrode.Type: ApplicationFiled: August 6, 2002Publication date: July 10, 2003Applicant: Fujitsu LimitedInventors: Yukinobu Hikosaka, Akio Itoh, Kazuaki Takai, Takeyasu Saito
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Patent number: 6046929Abstract: The source region and gate electrode of a field effect transistor including a drain region and a gate electrode in addition to the source region are connected by a first ferroelectric capacitor. The drain region and gate electrode are connected by a second ferroelectric capacitor. A ferroelectric memory device suitable for high integration is provided.Type: GrantFiled: March 31, 1999Date of Patent: April 4, 2000Assignee: Fujitsu LimitedInventors: Masaki Aoki, Akio Itoh, Mitsuteru Mushiga, Ko Nakamura, Takashi Eshita
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Patent number: 5812907Abstract: An image processing apparatus includes a first processor for outputting first image data and a second processor for outputting second image data different from the first image data. The apparatus also includes a first detector for detecting a processing stage of the first processor and a second detector for detecting a processing condition of the second processing means. The apparatus also includes means for judging whether operations, to interrupt the processing by the first processor and to execute the processing by the second processor, are permitted or inhibited on the basis of a first detection result of the first detector and a second detection result of the second detector.Type: GrantFiled: June 3, 1996Date of Patent: September 22, 1998Assignee: Canon Kabushiki KaishaInventors: Akio Itoh, Yoshihiko Suzuki, Shokyo Koh, Hirohiko Tashiro, Akinobu Nishikata
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Patent number: 5748773Abstract: An image processing apparatus having a first mode for processing electrical signals by a pre-scan operation and a second mode for processing electrical signals by a main scan operation. The first mode forms a histogram on the basis of electrical signals obtained by the pre-scan operation, and detects predetermined feature points from the formed histogram. A table is formed for converting signal levels of the electrical signals according to the detected predetermined feature points of the histogram based on the image type of the original. The second mode generates reproduction signals from electrical signals obtained by the main scan operation in accordance with the table.Type: GrantFiled: November 17, 1994Date of Patent: May 5, 1998Assignee: Canon Kabushiki KaishaInventors: Hirohiko Tashiro, Yoshiyuki Suzuki, Hiroyuki Ichikawa, Satoru Kutsuwada, Akio Itoh, Yoshinori Abe