Abstract: A chimeric non-human animal having an in vivo human hepatocyte population, wherein the effects of non-human animal cells on drug metabolism are suppressed or deleted is provided. A method for producing a chimeric non-human animal that lacks a drug-metabolizing system or has a suppressed drug-metabolizing system and is provided with a drug-metabolizing system driven by human hepatocytes, is provided. The method comprises transplanting human hepatocytes into a non-human animal characterized by (i) being immunodeficient, (ii) having liver damage, and (iii) lacking the functions of an endogenous Cyp3a gene.

Abstract: A chimeric non-human animal having an in vivo human hepatocyte population, wherein the effects of non-human animal cells on drug metabolism are suppressed or deleted is provided. A method for producing a chimeric non-human animal that lacks a drug-metabolizing system or has a suppressed drug-metabolizing system and is provided with a drug-metabolizing system driven by human hepatocytes, is provided. The method comprises transplanting human hepatocytes into a non-human animal characterized by (i) being immunodeficient, (ii) having liver damage, and (iii) lacking the functions of an endogenous Cyp3a gene.

Abstract: A no-needle blood access device for hemodialysis comprising, an elongated metallic body (20), the body being provided at its upper surface with a recess (22), a periphery of the recess being formed with a peripheral wall (24) defining a well (26) therein; a pair of shutters (40, 42) slidably housed within opposed pockets (36, 38) respectively, the pockets being formed at the upper part of the body so that each of their lower surfaces flush with the bottom surface of the recess, each of the shutters including through-holes (40c, 42c) respectively; a longitudinally extending through-hole (30) disposed in the lower part of the body, each of first and second artificial conduits (12, 14) being fitted into respective ends of the longitudinally extending through-hole, the artificial conduits being anastomosed to a targeted artery or vein; and a pair of vertical through-holes (44, 46) disposed at portions of the body each communicating to the respective through-holes of the shutters when they are opened; whereby the

Abstract: A no-needle blood access device for hemodialysis including a cylindrical external body (20), the lower portion of the external body being provided with openings (28) at diametrically facing locations. Pipe members (30) are mounted in the respective openings. First and second artificial conduits (12, 14) are fitted into the respective pipe member, each of the artificial conduits being anastomosed to a targeted artery or vein; and a columnar internal body (40) fitted into the external body so as to be rotated in the external body.

Abstract: A semiconductor device comprises a first insulating film which is formed on a semiconductor substrate and has a groove whose bottom does not reach said semiconductor substrate, and a capacitive element which is composed of a lower electrode of a first metal layer which is embedded in said groove, a capacitive insulating film of a second insulating film formed on said lower electrode, and an upper electrode of a second metal layer formed in a region where both said lower electrode and said capacitive insulating film are formed.

Abstract: A semiconductor device comprises:a semiconductor substrate; a plurality of active regions for forming semiconductor elements, the active regions being formed on the semiconductor substrate; a device isolation region for separating the plural active regions from each other, the device isolation region including a trench region filled with an insulating film and a pseudo active region formed adjacent to the trench region; a wiring layer formed above the semiconductor substrate; and a pseudo conductive film formed on the device isolation region, wherein, if the pseudo conductive film is partially or entirely located under the wiring layer, the pseudo conductive film is formed only on the trench region.

Abstract: A semiconductor device comprises: a semiconductor substrate; a plurality of active regions for forming semiconductor elements, the active regions being formed on the semiconductor substrate; a device isolation region for separating the plural active regions from each other, the device isolation region including a trench region filled with an insulating film and a pseudo active region formed adjacent to the trench region; a wiring layer formed above the semiconductor substrate; and a pseudo conductive film formed on the device isolation region, wherein, if the pseudo conductive film is partially or entirely located under the wiring layer, the pseudo conductive film is formed only on the trench region.

Abstract: A no-needle blood access device for hemodialysis comprising, a cylindrical external body (20), the external body including a peripheral wall (22) and a bottom wall (24) and opens to its top, the lower portion of the external body being provided with openings (28) at locations diametrically facing with respect to each other, each of pipe members (30) being mounted on the respective openings, each of first and second artificial conduits (12, 14) being fitted into the respective pipe member, each of the artificial conduits being anastomosed to a targeted artery or vein; and a columnar internal body (40) fitted into the external body so as to be rotated in the external body, the internal body being provided with a first through-hole (42) diametrically extending through the internal body in the horizontal direction at the location having a height on which the openings are mounted; the internal body being provided with a second through-hole (48) extending between a first position (44) spaced at an angular distance

Abstract: A no-needle blood access device for hemodialysis comprising, an artificial conduit (12) whose opposite ends are anastomosed to a targeted artery or vein; a metallic body (20), the body including a cylindrical horizontal portion (22) covering the entire circumference of the conduit or an arcuate-shaped horizontal portion (50) covering at least an upper half of the circumference of the conduit, and a cylindrical vertical portion (24) connected to approximately the center of the upper part of the horizontal portion so as to be disposed perpendicular to the horizontal portion and defining a well (26) therein, the horizontal portion being provided at the part located at the bottom of the well with a first pair of apertures (30, 32), the conduit being provided at the corresponding part with a second pair of apertures (30, 32), whereby the well is in communication with the conduit through the apertures; and a pair of shutters (34, 36) slidably housed within opposed pockets formed in the upper part of the horizontal

Abstract: A display device that is automatically operable with various types of standards of video signals has a display panel, a controller, and a timing generator. The display panel includes pixels arranged in the form of a matrix to form an image. The display panel also contains a built-in vertical scanning circuit that is operable in response to input timing signals and sequentially selects the respective rows of the pixels. Additionally, the display panel contains a built-in horizontal scanning circuit that is operable in response to input timing signals and distributes the various types of standards of the video signals provided from the exterior to the selected rows of the pixels, thereby displaying the image. The controller deciphers the standard of the video signal provided from the exterior and automatically supplies the adjustment information required for optimizing the picture.

Abstract: A method of manufacturing a semiconductor device comprises; forming a device isolation region in a semiconductor substrate; forming at least a first conductivity type impurity region in the semiconductor substrate; and forming on the semiconductor substrate a transistor including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the first conductivity type impurity region is formed by the steps of: an ion implantation 1 having a concentration peak at a location deeper than the bottom of the device isolation region; an ion implantation 2 having a concentration peak at a location around the bottom of the device isolation region; an ion implantation 3 having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4 having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed.

Abstract: An active matrix display device comprises a plurality of pixels, a vertical scanning circuit, a horizontal scanning circuit, and a thinning-out circuit. The plurality of pixels are arranged in a matrix on a normal standard screen. The vertical scanning circuit is for sequentially selecting pixels every line. The horizontal scanning circuit is for writing single horizontal period portions of a wide standard image signal for selected lines of pixels. The thinning-out circuit is for controlling timing of the vertical scanning circuit sequential selection and thinning-out a prescribed number of horizontal period portions from a wide standard image signal in such a manner that wide displaying compressed in the longitudinal direction of the screen is carried out. It is therefore possible for a normal standard screen to change over to displaying a wide standard image.

Abstract: An MOS transistor comprises a semiconductor substrate having a field region; a gate electrode formed on the semiconductor substrate through the intermediatry of a gate insulating film; and source/drain regions formed in the semiconductor substrate; wherein the field region including at least a lower insulating film and an upper insulating film made of a material permitting the upper insulating film to be selectively etched with respect to the lower insulating film; the gate electrode being configured such that the gate length of a top surface thereof is greater than the gate length of a bottom surface thereof facing a channel region positioned between the source/drain regions; the gate electrode having a sidewall spacer formed of a sidewall insulating layer made of the lower insulating film and a material permitting the sidewall insulating layer to be selectively etched with respect to the upper insulating film, the sidewall spacer contacting a side wall of the gate electrode for covering an outer periphery o

Abstract: an active matrix display device comprises a plurality of pixels, a vertical scanning circuit, a horizontal scanning circuit and a thinning-out circuit. The plurality of pixels are arranged in a matrix on a normal standard screen. The vertical scanning circuit is for sequentially selecting pixels every line. The horizontal scanning circuit is for writing single horizontal period portions of a wide standard image signal for selected lines of pixels and the thinning-out circuit is for controlling timing of the vertical scanning circuit sequential selection and thinning-out a prescribed number of horizontal period portions from a wide standard image signal in such a manner that wide displaying compressed in the longitudinal direction of the screen is carried out. It is therefore possible for a normal standard screen to change over to displaying a wide standard image.

Abstract: A semiconductor device which comprises plural memory cells, said memory cell comprising: a flip-flop circuit including a pair of drive transistors each having a gate, a gate oxide film and source/drain regions, and a pair of load TFTs connected to said pair of drive transistors, each of said load TFTs having a gate electrode, a gate oxide film and an active layer including source/drain regions all of which are deposited sequentially in that order; and a pair of access transistors connected to said flip-flop circuit; wherein either one of the source/drain regions of said each TFT is connected to at least either one drive transistor at either one of the source/drain regions thereof or the other drive transistor at the gate thereof via a semiconductor pad, and the other of the source/drain regions of the TFT is connected to a wiring layer via a semiconductor pad; and at least surface layer of said semiconductor pad has the same conductivity type as that of the source/drain regions of the TFT.

Abstract: In a plasma filtration process including a treatment with a primary filter for separating blood into blood cells and plasma and a treatment with a secondary filter for removing harmful macromolecules from the separated plasma for purification, the secondary filter is washed by passing a washing liquid through an inner chamber of the filter, an outer chamber thereof or both the chambers in an amount corresponding to 5 to 50% of the priming volume of the filter every time the filtration pressure has reached 70 to 100% of the withstanding pressure of the secondary filter. This washing procedure reduces the time required for the filtration of plasma to about 60 to 70% of the time conventionally needed, shortens the patient restraining time, and decreases the amount of washing liquid to be used to consequently diminish the disposal loss of plasma from the system.

Abstract: In a process for filtering plasma by separating blood into blood cells and plasma by a primary filter and filtering the separated plasma by a secondary filter to remove macromolecules from the plasma as harmful components, the loss of plasma to be discarded from the system by a procedure for eliminating plugging of the secondary filter can be diminished by opening an inner chamber of the secondary filter to the atmosphere to thereby lower the internal pressure of the chamber every time increase of the pressure to an upper limit value due to an increasing plugging tendency of the secondary filter is detected, and washing the interior of the secondary filter from the inner and outer chamber sides after the internal pressure has lowered.

Abstract: Element isolation regions are first formed on a silicon substrate. Active regions other than the isolation regions are formed with an oxide film. Then, a first oxidization prevention layer, a semiconductor layer and a second oxidization prevention layer are formed on the substrate in that order. A resist pattern having a hole in a P-channel MOS transistor formation region is formed. The second oxidization prevention layer in the P-channel MOS transistor formation region is removed and an impurity is ion-implanted using the resist pattern as a mask. After removing the resist pattern, the substrate is thermally treated in the presence of an oxidizer substance to transform an exposed portion of the semiconductor layer into an oxidized semiconductor layer and at the same time to diffuse the implanted impurity in the substrate to thereby form an N-well.

Abstract: A method for producing a semiconductor device in which an electrode and an impurity-diffused layer formed on a semiconductor substrate are electrically connected to each other, includes the following steps: forming a first insulating film on the semiconductor substrate; forming a first mask layer on the first insulating film, and forming a second mask layer on the first mask layer, the first mask layer comprising a first opening for exposing a part of the surface of the semiconductor substrate, the second mask layer comprising a second opening, at least the exposed part of the surface of the semiconductor substrate being exposed by the second opening; removing at least a part of the first insulating film exposed through the first opening; implanting a first impurity into the semiconductor substrate using the second mask layer as a mask and employing an acceleration energy at which the first impurity can pass through the first mask layer; removing the second mask layer, and forming the electrode doped with a s

Abstract: A process for manufacturing a semiconductor device which comprises the following steps of (i) forming a first insulating film on the whole surface of a semiconductor substrate having thereon a thin conductive layer with an intervening gate insulating film, (ii) removing the first insulating film at a channel region to cause the thin conductive layer to be exposed, thereby forming an opening portion, (iii) implanting ions in the opening portion to form a channel region in the substrate, (iv) forming a gate electrode of a conductive material in the opening portion, (v) removing only the first insulating film with leaving the gate electrode as it is and then implanting ions by using the gate as a mask to form a low carrier density region in the substrate, (vi) layering a second insulating film on the substrate including the gate and then carrying out an anisotropic etching to build a sidewall of the gate electrode, and (vii) implanting ions by use of the gate electrode and its sidewall as a mask to form a high c