Patents by Inventor Akio Tamagawa

Akio Tamagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9627527
    Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: April 18, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Akio Tamagawa, Makoto Tanaka
  • Publication number: 20160197179
    Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.
    Type: Application
    Filed: March 16, 2016
    Publication date: July 7, 2016
    Applicant: Renesas Electronics Corporation
    Inventors: Akio TAMAGAWA, Makoto TANAKA
  • Patent number: 9324788
    Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 26, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Akio Tamagawa, Makoto Tanaka
  • Publication number: 20150115359
    Abstract: In a semiconductor device, a lightly doped second semiconductor layer of a first conductive type is joined with a heavily doped first semiconductor layer of the first conductive type. A power transistor having a first conductive type channel and a transistor are formed in surface regions of the second semiconductor layer, respectively. A first diffusion layer of a second conductive type is formed in a surface region of the second semiconductor layer to provide a boundary between the power transistor and the transistor. The first semiconductor layer functions as a drain of the power transistor. The first diffusion layer region is set to the same voltage as that of the drain.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 30, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Akio TAMAGAWA, Makoto TANAKA
  • Patent number: 8254075
    Abstract: A semiconductor device includes a current supply section configured to control a current flowing through a load circuit; an overcurrent detecting section configured to detect based on the current, that an overcurrent flows through the load circuit, to output an overcurrent signal; and an overheat detecting circuit configured to detect that a peripheral temperature exceeds a detected temperature, in response to the overcurrent signal, and output an overheat detection signal. The overheat detecting circuit has a hysteresis to the detection temperature, and the detection temperature contains an overheat detection temperature used to detect an overheat state and a recovery temperature used to detect to have escaped from the overheat state.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: August 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshihiro Higashida, Akio Tamagawa
  • Publication number: 20110058297
    Abstract: A semiconductor device includes a current supply section configured to control a current flowing through a load circuit; an overcurrent detecting section configured to detect based on the current, that an overcurrent flows through the load circuit, to output an overcurrent signal; and an overheat detecting circuit configured to detect that a peripheral temperature exceeds a detected temperature; in response to the overcurrent signal, and output an overheat detection signal. The overheat detecting circuit has a hysteresis to the detection temperature, and the detection temperature contains an overheat detection temperature used to detect an overheat state and a recovery temperature used to detect to have escaped from the overheat state.
    Type: Application
    Filed: September 8, 2010
    Publication date: March 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshihiro HIGASHIDA, Akio TAMAGAWA
  • Patent number: 7545198
    Abstract: A semiconductor device includes an output MOS transistor to control a current flowing into an L-load in accordance with a gate signal input to its gate. A level shifter shifts the level of an input signal based on a power supply voltage at a Vcc terminal to generate the gate signal. A control signal adjuster detects an output voltage between the L-load and the output MOS transistor based on the power supply voltage and adjusts the level of the gate signal.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: June 9, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Akio Tamagawa
  • Patent number: 7540657
    Abstract: A temperature detection circuit according to the present invention includes a potential generating part and a temperature detection part. The potential generating part generates a potential according to an environmental temperature, and the temperature detection part detects a temperature based on a detection potential generated in the potential generated part. The temperature detection part is a resistive load type inverter circuit that outputs a detection signal when the generated potential reaches a threshold voltage. The potential generating part applies the detection potential to the inverter circuit through a temperature sensor including cascaded diodes and an NchMOSFET. The threshold voltage of the inverter circuit is determined based on the NchMOSFET in the inverter circuit, and the NchMOSFET is a MOSFET having the same characteristic as the NchMOSFET of the potential generating part.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: June 2, 2009
    Assignee: NEC Electronics Corporation
    Inventors: Takeshi Mikuni, Akio Tamagawa
  • Publication number: 20080316666
    Abstract: An inductive load is connected between an output node and a first power supply which supplies a first power supply voltage. An inductive load driving apparatus includes a flyback voltage generation control circuit connected in series with the inductive load through the output node between the first power supply voltage and a second power supply voltage which is lower than the first power supply voltage. The flyback voltage generation control circuit includes a switch turned on in response to a first control signal and turned off in response to a second control signal, and a flyback voltage is generated on the output node when the switch is turned off, and is not generated when the switch is turned on.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 25, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Akio TAMAGAWA
  • Patent number: 7350974
    Abstract: A temperature detection circuit according to the present invention includes a potential generating part and a temperature detection part. The potential generating part generates a potential according to an environmental temperature, and the temperature detection part detects a temperature based on a detection potential generated in the potential generated part. The temperature detection part is a resistive load type inverter circuit that outputs a detection signal when the generated potential reaches a threshold voltage. The potential generating part applies the detection potential to the inverter circuit through a temperature sensor including cascaded diodes and an NchMOSFET. The threshold voltage of the inverter circuit is determined based on the NchMOSFET in the inverter circuit, and the NchMOSFET is a MOSFET having the same characteristic as the NchMOSFET of the potential generating part.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: April 1, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Takeshi Mikuni, Akio Tamagawa
  • Publication number: 20080013597
    Abstract: A temperature detection circuit according to the present invention includes a potential generating part and a temperature detection part. The potential generating part generates a potential according to an environmental temperature, and the temperature detection part detects a temperature based on a detection potential generated in the potential generated part. The temperature detection part is a resistive load type inverter circuit that outputs a detection signal when the generated potential reaches a threshold voltage. The potential generating part applies the detection potential to the inverter circuit through a temperature sensor including cascaded diodes and an NchMOSFET. The threshold voltage of the inverter circuit is determined based on the NchMOSFET in the inverter circuit, and the NchMOSFET is a MOSFET having the same characteristic as the NchMOSFET of the potential generating part.
    Type: Application
    Filed: September 18, 2007
    Publication date: January 17, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Takeshi Mikuni, Akio Tamagawa
  • Publication number: 20070103223
    Abstract: A semiconductor device includes an output MOS transistor to control a current flowing into an L-load in accordance with a gate signal input to its gate, a level shifter to sift the level of an input signal based on a power supply voltage at a Vcc terminal to generate the gate signal, and a control signal adjuster to detect an output voltage between the L-load and the output MOS transistor based on the power supply voltage and adjusting the level of the gate signal.
    Type: Application
    Filed: October 18, 2006
    Publication date: May 10, 2007
    Inventor: Akio Tamagawa
  • Publication number: 20060056486
    Abstract: A temperature detection circuit according to the present invention includes a potential generating part and a temperature detection part. The potential generating part generates a potential according to an environmental temperature, and the temperature detection part detects a temperature based on a detection potential generated in the potential generated part. The temperature detection part is a resistive load type inverter circuit that outputs a detection signal when the generated potential reaches a threshold voltage. The potential generating part applies the detection potential to the inverter circuit through a temperature sensor including cascaded diodes and an NchMOSFET. The threshold voltage of the inverter circuit is determined based on the NchMOSFET in the inverter circuit, and the NchMOSFET is a MOSFET having the same characteristic as the NchMOSFET of the potential generating part.
    Type: Application
    Filed: August 23, 2005
    Publication date: March 16, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Takeshi Mikuni, Akio Tamagawa
  • Patent number: 6661260
    Abstract: An output circuit of a semiconductor circuit includes a higher potential side power supply line, a output signal line on which an output signal is outputted, a control signal line on which a control signal is transferred, a gate signal line on which a gate signal is transferred, an output transistor, a first switch and a gate driving circuit. The output transistor is connected between the higher potential side power supply line and the output signal line to operate in response to the gate signal on the gate signal line. The first switch is connected to the higher potential side power supply line to turn off in response to the control signal of a first state and turn on in response to the control signal of a second state. The gate driving circuit is connected between the first switch and the control signal line to generate the gate signal onto the gate signal line based on a gate control signal when the first switch is turned on.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: December 9, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Akihiro Nakahara, Akio Tamagawa
  • Publication number: 20020140466
    Abstract: An output circuit of a semiconductor circuit includes a higher potential side power supply line, a output signal line on which an output signal is outputted, a control signal line on which a control signal is transferred, a gate signal line on which a gate signal is transferred, an output transistor, a first switch and a gate driving circuit. The output transistor is connected between the higher potential side power supply line and the output signal line to operate in response to the gate signal on the gate signal line. The first switch is connected to the higher potential side power supply line to turn off in response to the control signal of a first state and turn on in response to the control signal of a second state. The gate driving circuit is connected between the first switch and the control signal line to generate the gate signal onto the gate signal line based on a gate control signal when the first switch is turned on.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 3, 2002
    Applicant: NEC CORPORATION
    Inventors: Akihiro Nakahara, Akio Tamagawa
  • Patent number: 6046491
    Abstract: A semiconductor resistor element that is able to remove the effect of an electric potential change of a wiring conductor is provided. This element includes a first semiconductor resistor region formed in a surface area of a substructure, a second semiconductor resistor region electrically connected to a first end of the first resistor region, a third semiconductor resistor region electrically connected to a second end of the first resistor region. The first resistor region has a first doping concentration. The second resistor region has a second doping concentration higher than the first doping concentration. The third resistor region has a third doping concentration equal to the second doping concentration. The second and third resistor regions serve as a pair of terminals of the semiconductor resistor element. The second and third resistor regions may be contacted with or apart from the respective ends of the first resistor region.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: April 4, 2000
    Assignee: NEC Corporation
    Inventor: Akio Tamagawa
  • Patent number: 5754078
    Abstract: A first current mirror circuit 6 inversion amplifies the output voltage of an operational amplifier 10 with high potential power supply potential V.sub.DD to a voltage with a ground potential as a reference, thus driving a p-MOS transistor Q.sub.P3 of a push-pull output stage 19. A second current mirror circuit 7 inversion amplifies the output voltage of the operational amplifier 10 with the ground potential as a reference to a voltage with high potential power supply voltage V.sub.DD as a reference, thus driving the n-MOS transistor Q.sub.N3 in the push-pull output stage 19. Thus push-pull output stage through current when the input voltage is suddenly switched is eliminated and crossover distortion is reduced.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: May 19, 1998
    Assignee: NEC Corporation
    Inventor: Akio Tamagawa
  • Patent number: 5623222
    Abstract: A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal.
    Type: Grant
    Filed: November 8, 1995
    Date of Patent: April 22, 1997
    Assignee: NEC Corporation
    Inventor: Akio Tamagawa
  • Patent number: 5532916
    Abstract: A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal.
    Type: Grant
    Filed: May 9, 1995
    Date of Patent: July 2, 1996
    Assignee: NEC Corporation
    Inventor: Akio Tamagawa
  • Patent number: 5461557
    Abstract: A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal.
    Type: Grant
    Filed: September 2, 1993
    Date of Patent: October 24, 1995
    Assignee: NEC Corporation
    Inventor: Akio Tamagawa