Abstract: Provided is a semiconductor device that includes one or more transistor portions and one or more diode portions provided at different positions in a top view, a semiconductor substrate provided with the one or more transistor portions and the one or more diode portions, an upper surface electrode arranged above the semiconductor substrate, and one or more first mark portions arranged upper than the upper surface electrode, each of the one or more first mark portions being arranged so as to overlap both one of the one or more transistor portions and one of the one or more diode portions in the top view, in which each of the one or more first mark portions has a concave shape or a convex shape in the top view or in a depth direction of the semiconductor substrate.

Abstract: A first conductive pattern includes a first input region overlapping a first semiconductor device and a second input region overlapping a second semiconductor device. An output electrode of the first semiconductor device and an output electrode of the second semiconductor device are connected with each other by a first wiring member. The output electrode of the second semiconductor device and a second conductive pattern are connected with each other by a second wiring member. A ratio of a current flowing from the second input region to the second conductive pattern via the second semiconductor device, relative to a current flowing from the first input region to the second conductive pattern via the first semiconductor device, is equal to or greater than 0.90 and equal to or less than 1.10.

Abstract: Provided is a semiconductor device in which one mesa portion of two mesa portions in contact with a gate trench portion is an active mesa portion in which an emitter region of a first conductivity type having a doping concentration higher than that of a drift region is arranged in contact with the gate trench portion, the other mesa portion of two mesa portions in contact with the gate trench portion is a dummy mesa portion having no emitter region, and a dummy contact resistance which is a resistance of the dummy mesa portion and an emitter electrode is 1000 times or more as high as an active contact resistance which is a resistance of the active mesa portion and the emitter electrode.

Abstract: A semiconductor module includes a laminated substrate including an insulating board and a plurality of circuit boards that are arranged on an upper face of the insulating board, the plurality of circuit boards including first and second circuit boards, a semiconductor element disposed on the first circuit board and including, on an upper face of the semiconductor element, a main electrode, a gate pad, and a gate runner electrically connected to the gate pad, and a first wiring member electrically connecting the main electrode to the second circuit board. The gate runner extends so as to divide the main electrode into a plurality of electrodes including a first main electrode at a first side and a second main electrode at a second side, and the first wiring member is arranged to cross over the gate runner.

Abstract: A semiconductor device includes a first semiconductor chip including a plurality of first control electrodes, each of which is disposed at a respective one of corner portions on a first front surface thereof, a first output electrode disposed on the first front surface, and a first input electrode disposed on a first rear surface thereof, a second semiconductor chip including a plurality of second control electrodes, each of which is disposed at a respective one of corner portions on a second front surface thereof, a second output electrode disposed on the second front surface, and a second input electrode disposed on a second rear surface thereof, the second semiconductor chip being disposed adjacent to the first semiconductor chip, and a first connection wire which connects one of the first control electrodes and one of the second control electrodes.

Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.

Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.

Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.

Abstract: A semiconductor device including a semiconductor substrate and a plurality of trench structures formed on the semiconductor substrate. The semiconductor substrate includes a first element region for forming an insulated gate bipolar transistor therein, and a second element region for forming a diode therein, the semiconductor substrate constituting a drift layer. The plurality of trench structures includes a plurality of gate trench structures provided on a front surface side of the first element region, each gate trench structure having an electrode provided therein that is based on a gate potential, and a plurality of floating trench structures provided on a front surface side of the second element region, each floating trench structure having an electrode provided therein that has a floating potential.

Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.

Abstract: A semiconductor device is provided to reduce thermal fatigue in a junction portion of an external wiring to enhance long-term reliability, where the semiconductor device includes a semiconductor substrate, a transistor portion and a diode portion that are alternately arranged along a first direction parallel to a front surface of the semiconductor substrate inside the semiconductor substrate, a surface electrode that is provided above the transistor portion and the diode portion and that is electrically connected to the transistor portion and the diode portion, an external wiring that is joined to the surface electrode and that has a contact width with the surface electrode in the first direction, the contact width being larger than at least one of a width of the transistor portion in the first direction and a width of the diode portion in the first direction.

Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.

Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.

Abstract: A semiconductor device is provided to reduce thermal fatigue in a junction portion of an external wiring to enhance long-term reliability, where the semiconductor device includes a semiconductor substrate, a transistor portion and a diode portion that are alternately arranged along a first direction parallel to a front surface of the semiconductor substrate inside the semiconductor substrate, a surface electrode that is provided above the transistor portion and the diode portion and that is electrically connected to the transistor portion and the diode portion, an external wiring that is joined to the surface electrode and that has a contact width with the surface electrode in the first direction, the contact width being larger than at least one of a width of the transistor portion in the first direction and a width of the diode portion in the first direction.

Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.

Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.

Abstract: A semiconductor device including a semiconductor substrate and a plurality of trench structures formed on the semiconductor substrate. The semiconductor substrate includes a first element region for forming an insulated gate bipolar transistor therein, and a second element region for forming a diode therein, the semiconductor substrate constituting a drift layer. The plurality of trench structures includes a plurality of gate trench structures provided on a front surface side of the first element region, each gate trench structure having an electrode provided therein that is based on a gate potential, and a plurality of floating trench structures provided on a front surface side of the second element region, each floating trench structure having an electrode provided therein that has a floating potential.

Abstract: A semiconductor device includes an IGBT region and a FWD region. The IGBT region includes a plurality of trench structures, p-type base regions provided between the trench structures, n+ emitter regions provided on the p-type base regions, an interlayer insulating film provided on the n+ emitter regions and containing contact holes therein, and an emitter electrode connected to the n+ emitter regions through the contact holes. In a portion of the IGBT region that abuts the FWD region, the interlayer insulating film covers and insulates the trench structures without having the contact holes.

Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.