Patents by Inventor Akira Bando
Akira Bando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8867247Abstract: A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.Type: GrantFiled: March 15, 2012Date of Patent: October 21, 2014Assignee: Hitachi, Ltd.Inventors: Akira Bando, Yasuhiro Kiyofuji, Masaya Ichinose, Hiromitsu Sakai, Yasuhiro Imazu
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Publication number: 20140167701Abstract: The invention provides a power converter including a plurality of power conversion units each connected to a different feeder, a DC energy interchange unit connected to the power conversion units and connected to a secondary battery, and a power control unit which instructs the regeneration-side power conversion unit connected to the regeneration-side feeder of the feeders, through which a regenerative current flows, and the consumption-side power conversion unit connected to the consumption-side feeder through which a current consumption flows, to output power from the regeneration-side feeder to the consumption-side feeder through the DC energy interchange unit. The power control unit also determines the voltage of the DC energy interchange unit in such a manner as to input/output energy corresponding to the sum of regenerative power of the regeneration-side feeder and consumed power of the consumption-side feeder to and from the secondary battery.Type: ApplicationFiled: December 4, 2013Publication date: June 19, 2014Applicant: Hitachi, Ltd.Inventors: Yasuhiro NAKATSUKA, Yasuhiro IMAZU, Akihiro MAOKA, Masaya ICHINOSE, Yasuhiro KIYOFUJI, Akira BANDO
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Publication number: 20140152087Abstract: Feeder sections to be a target of interchange are to be expanded in order to improve the effect of power interchange between feeders. A control device for railway power conditioner is connected to a first feeder connected to a load side of a transformer in a first railway substation including a transformer receiving power from a power grid, and a second feeder connected to a load side of a transformer in a second railway substation including a transformer receiving power from a power grid, and decides an amount of power interchanged between the first and second feeders. The control device decides the amount of power interchanged between the first and second feeders, using the received power in the first railway substation and power on the first feeder, and the received power in the second railway substation and power on the second feeder.Type: ApplicationFiled: November 15, 2013Publication date: June 5, 2014Applicant: Hitachi, Ltd.Inventors: Yasuhiro NAKATSUKA, Yasuhiro IMAZU, Osamu SAKUCHI, Masaya ICHINOSE, Yasuhiro KIYOFUJI, Akira BANDO, Jun NARUSHIMA
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Publication number: 20140078796Abstract: In the present invention, provided is a power conversion apparatus in which at least one energy storage element and at least one switching element are included, a plurality of series circuits of a transformer winding and an arm in which one or a plurality of at least two-terminal unit converters which depend on ON/OFF of the switching element and supply a zero voltage or a voltage depending on a voltage of the energy storage element are connected in series are connected in parallel, and a multi-phase power source or a multi-phase load is connected to another winding of the transformer, and the parallel-connection point is set as a DC terminal, and which includes means for controlling a current flowing through each of the arms to have a phase and amplitude different from each other.Type: ApplicationFiled: August 28, 2013Publication date: March 20, 2014Applicant: Hitachi, Ltd.Inventors: Shigenori INOUE, Shuji KATOH, Akira BANDO, Yasuhiro KIYOFUJI, Yoshio EGUCHI, Masaya ICHINOSE, Takayoshi YAMAMOTO
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Publication number: 20140016379Abstract: A control apparatus for use with a voltage source converter includes legs each of which is configured by a plurality of converter modules each having capacitors. Each of the legs has a first terminal on a positive side and a second terminal on a negative side. The control apparatus is operative to create command pulses for operating the converter modules to operate the converter modules. The command pulses have a frequency that is a non-integral multiple of a frequency of a system voltage. The non-integral multiple is 3.5, for example.Type: ApplicationFiled: July 10, 2013Publication date: January 16, 2014Inventors: Takayoshi YAMAMOTO, Masaya ICHINOSE, Akira BANDO, Shigenori INOUE, Toru YOSHIHARA
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Patent number: 8541292Abstract: There is provided a group III nitride semiconductor epitaxial substrate which has a suppressed level of threading dislocation in the vertical direction and excellent crystal quality, the group III nitride semiconductor epitaxial substrate including a substrate (1) for growing an epitaxial film; and an ELO layer (4) having a composition of AlxGa1-xN (0?x?1) formed either on top of the substrate (1) or on top of a group III nitride layer (2) formed on top of the substrate (1), wherein the ELO layer (4) is a layer formed by using a mask pattern (3), which is composed of carbon and is formed either on top of the substrate (1) or on top of the group III nitride layer (2).Type: GrantFiled: January 28, 2009Date of Patent: September 24, 2013Assignee: Showa Denko K.K.Inventors: Akira Bando, Hiroshi Amano
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Publication number: 20130241463Abstract: The excitation overcurrent detection unit for the doubly-fed electric machine is provided with a function to determine an excitation current magnitude relationship among three phases. The firing pulse is held to on-state or off-state to cause the largest-current phase and the second-largest-current phase to charge the DC capacitor by the operation of diodes. The conduction ratio of the third-largest-current phase or minimum current phase is controlled according to the detected current value to protect against a possible short-circuit across the DC capacitor. When the voltage of the DC capacitor exceeds a preset value, the voltage is suppressed by operating active or passive power devices.Type: ApplicationFiled: March 15, 2012Publication date: September 19, 2013Applicant: Hitachi, LtdInventors: Akira Bando, Masaya Ichinose, Yasuhiro Kiyofuji, Yasuaki Nakayama
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Patent number: 8423681Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.Type: GrantFiled: December 6, 2011Date of Patent: April 16, 2013Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Engineering & Services Co., Ltd.Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
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Publication number: 20120170333Abstract: A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.Type: ApplicationFiled: March 15, 2012Publication date: July 5, 2012Applicant: Hitachi, Ltd.Inventors: Akira Bando, Yasuhiro Kiyofuji, Masaya Ichinose, Hiromitsu Sakai, Yasuhiro Imazu
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Patent number: 8209594Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.Type: GrantFiled: October 8, 2010Date of Patent: June 26, 2012Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.Inventors: Akihiro Onozuka, Masakazu Ishikawa, Masamitsu Kobayashi, Takashi Umehara, Shin Kokura, Hiromichi Endoh, Satoru Funaki, Hisao Nagayama, Masahiro Shiraishi, Akira Bando, Eiji Kobayashi, Yasuyuki Furuta, Naoya Mashiko
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Publication number: 20120124268Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.Type: ApplicationFiled: December 6, 2011Publication date: May 17, 2012Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
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Patent number: 8161362Abstract: Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.Type: GrantFiled: June 7, 2006Date of Patent: April 17, 2012Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.Inventors: Akira Bando, Shin Kokura, Takashi Umehara, Masamitsu Kobayashi, Hisao Nagayama, Naoya Mashiko, Masakazu Ishikawa, Masahiro Shiraishi, Akihiro Onozuka, Hiromichi Endoh, Tsutomu Yamada, Satoru Funaki
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Patent number: 8095695Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.Type: GrantFiled: January 23, 2009Date of Patent: January 10, 2012Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Engineering & Services Co., Ltd.Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
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Publication number: 20110254048Abstract: An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, i.e., an AlxGa1-xN (0?x?1) epitaxial substrate succeeding in reducing the generation of cracking or dislocation, and enhancing the crystal quality. More specifically, an object of the present invention is to provide an AlxGa1-xN (0<x?1) epitaxial substrate useful for a light-emitting device in the ultraviolet or deep ultraviolet region. The inventive Group III nitride semiconductor epitaxial substrate comprises a base and an AlxGa1-xN (0?x?1) layer stacked on the base, wherein a layer allowing a crystal having ?C polarity and a crystal having +C polarity to coexist is present on the base side of the AlxGa1-xN (0?x?1) layer.Type: ApplicationFiled: August 6, 2008Publication date: October 20, 2011Applicant: SHOWA DENKO K.K.Inventors: Hiroshi Amano, Akira Bando
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Publication number: 20110214125Abstract: An input/output control apparatus including: a unit that controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors; a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.Type: ApplicationFiled: May 11, 2011Publication date: September 1, 2011Inventors: Akira Bando, Shin Kokura, Takashi Umehara, Masamitsu Kobayashi, Hisao Nagayama, Naoya Mashiko, Masakazu Ishikawa, Masahiro Shiraishi, Akihiro Onozuka, Hiromichi Endoh, Tsutomu Yamada, Satoru Funaki
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Publication number: 20110022936Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.Type: ApplicationFiled: October 8, 2010Publication date: January 27, 2011Inventors: Akihiro ONOZUKA, Masakazu Ishikawa, Masamitsu Kobayashi, Takashi Umehara, Shin Kokura, Hiromichi Endoh, Satoru Funaki, Hisao Nagayama, Masahiro Shiraishi, Akira Bando, Eiji Kobayashi, Yasuyuki Furuta, Naoya Mashiko
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Publication number: 20100327228Abstract: There is provided a group III nitride semiconductor epitaxial substrate which has a suppressed level of threading dislocation in the vertical direction and excellent crystal quality, the group III nitride semiconductor epitaxial substrate including a substrate (1) for growing an epitaxial film; and an ELO layer (4) having a composition of AlxGa1-xN (0?x?1) formed either on top of the substrate (1) or on top of a group III nitride layer (2) formed on top of the substrate (1), wherein the ELO layer (4) is a layer formed by using a mask pattern (3), which is composed of carbon and is formed either on top of the substrate (1) or on top of the group III nitride layer (2).Type: ApplicationFiled: January 28, 2009Publication date: December 30, 2010Applicant: Showa Denko K.K.Inventors: Akira Bando, Hiroshi Amano
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Publication number: 20100050062Abstract: The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, a safety flag, and a data error detection code from a received frame, and detecting a data error, a comparator comparing the matching of a plurality of received frames, and a selector selecting one received frame, from the frame error detection result, the safety flag, the data error detection result, and the matching comparison result; and determines the validity of transmitted data by the detection corresponding to the degree of reliability set with the safety flag.Type: ApplicationFiled: October 29, 2009Publication date: February 25, 2010Inventors: Akihiro ONOZUKA, Masakazu ISHIKAWA, Masamitsu KOBAYASHI, Takashi UMEHARA, Shin KOKURA, Hiromichi ENDOH, Satoru FUNAKI, Hisao NAGAYAMA, Masahiro SHIRAISHI, Akira BANDO, Eiji KOBAYASHI, Yasuyuki FURUTA, Naoya MASHIKO
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Publication number: 20090319756Abstract: The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.Type: ApplicationFiled: June 18, 2009Publication date: December 24, 2009Inventors: Toshiki Shimizu, Akira Bando, Yusaku Otsuka, Yasuhiro Kiyofuji, Elji Kobayashi, Akihiro Onozuka, Satoru Funaki, Masakazu Ishikawa, Hideaki Masuko, Yusuke Seki, Wataru Sasaki, Naoya Mashiko, Akihiro Nakano, Shin Kokura, Shoichi Ozawa, Yu Iwasaki
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Publication number: 20090239357Abstract: A substrate is formed of AlxGa1-xN, wherein 0?x?1. The substrate is a single crystal and is used producing a Group III nitride semiconductor device. A method for producing a substrate of AlxGa1-xN, wherein 0<x?1, includes the steps of forming a layer of AlxGa1-xN, wherein 0<x?1, on a base material and removing the base material. The method adopts the MOCVD method using a raw material molar ratio of a Group V element to Group III element that is 1000 or less, a temperature of 1200° C. or more for forming the layer of AlxGa1-xN, wherein 0<x?1. The base material is formed of one member selected from the group consisting of sapphire, SiC, Si, ZnO and Ga2O3. The substrate is used for fabricating a Group III nitride semiconductor device.Type: ApplicationFiled: May 4, 2009Publication date: September 24, 2009Applicant: SHOWA DENKO K.K.Inventors: Hiroshi Amano, Akira Bando