Patents by Inventor Akira Endo

Akira Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6898130
    Abstract: A semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. This structure in which the peripheral circuits are arranged at the center portion of the chip permits the longest signal transition paths to be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: May 24, 2005
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Publication number: 20040240259
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Application
    Filed: October 14, 2003
    Publication date: December 2, 2004
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Publication number: 20040238762
    Abstract: An extreme ultraviolet light source device which makes it possible to increase a working distance and obtain extreme ultraviolet light with a high output. The extreme ultraviolet light source device generates a plasma by irradiating a target (22) with laser light from a driving laser device (25), and generates extreme ultraviolet (EUV) light with a wavelength of several nanometers to several tens of nanometers. The extreme ultraviolet light source device comprises a target supply device which has a charge applying unit (23) that applies a charge to the target (22), and an acceleration unit (24) which accelerates the charged target (22) using an electromagnetic field. The target supply device supplies the target (22) comprised of a rare gas element such as xenon (Xe) or the like, or a metal such as lithium (Li), tin (Sn), tin oxide (SnO2) or the like, as ionized molecules, atoms or masses comprising a plurality of atoms, or as ionized clusters.
    Type: Application
    Filed: March 12, 2004
    Publication date: December 2, 2004
    Inventors: Haraku Mizoguchi, Akira Endo, Hirokazu Tanaka
  • Patent number: 6657901
    Abstract: A semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. A benefit of this structure in which the peripheral circuits are arranged at the center portion of the chip, is that the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: December 2, 2003
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Patent number: 6641966
    Abstract: A toner composition having a high light transmission when printed on a transparent medium, in addition to being superior in strength and durability is provided. Binder resin particles manufactured through a dispersing polymerization method are colored using at least one kind of dye and are then subjected to a process of injecting an organic finely divided powder and a charge controlling agent and to a process of externally adding a hydrophobic silica and a conductive titanium oxide, thereby making a toner composition having a gel percentage of 2 to 15%.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: November 4, 2003
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Akira Endo, Mitsuru Ohta, Hideo Ohira
  • Patent number: 6627709
    Abstract: Polymer particles are obtained by dispersion polymerization of styrene and acrylic acid ester along with an organosilane compound. The polymer particles have simultaneously an excellent particle size distribution, a large particle size and a satisfactory molecular weight. A toner in which the polymer particles are used as binder resin is especially suitable for high image quality and high-density printing.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: September 30, 2003
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Akira Endo
  • Patent number: 6558865
    Abstract: A toner composition that permits printing of clear-cut and high image quality without developing a fog or a blur is provided.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: May 6, 2003
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Akira Endo, Mitsuru Ohta, Hideo Ohira
  • Publication number: 20030031058
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Application
    Filed: September 26, 2002
    Publication date: February 13, 2003
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Publication number: 20030032749
    Abstract: Polymer particles are obtained by dispersion polymerization of styrene and acrylic acid ester along with an organosilane compound. The polymer particles have simultaneously an excellent particle size distribution, a large particle size and a satisfactory molecular weight. A toner in which the polymer particles are used as binder resin is especially suitable for high image quality and high-density printing.
    Type: Application
    Filed: April 12, 2000
    Publication date: February 13, 2003
    Inventor: AKIRA ENDO
  • Patent number: 6515913
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: February 4, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Publication number: 20020064722
    Abstract: A toner composition that permits printing of clear-cut and high image quality without developing a fog or a blur is provided.
    Type: Application
    Filed: September 20, 2001
    Publication date: May 30, 2002
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Akira Endo, Mitsuru Ohta, Hideo Ohira
  • Publication number: 20020054514
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Application
    Filed: December 4, 2001
    Publication date: May 9, 2002
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Publication number: 20020055054
    Abstract: A toner composition having a high light transmission when printed on a transparent medium, in addition to being superior in strength and durability is provided. Binder resin particles manufactured through a dispersing polymerization method are colored using at least one kind of dye and are then subjected to a process of injecting an organic finely divided powder and a charge controlling agent and to a process of externally adding a hydrophobic silica and a conductive titanium oxide, thereby making a toner composition having a gel percentage of 2 to 15%.
    Type: Application
    Filed: August 30, 2001
    Publication date: May 9, 2002
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Akira Endo, Mitsuru Ohta, Hideo Ohira
  • Patent number: 6335884
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: January 1, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Patent number: 6268669
    Abstract: An electric motor 10 for an electric power steering system, in which a board mounting portion 23 of aluminum for partitioning an electric motor body 10A and a circuit board 40 is formed all over the inner side of a motor case 20 and in which a bearing 25 of an output shaft 11 of the electric motor body 10A is supported on the board mounting portion 23 to release the heat effectively from FETs 43 mounted on the circuit board 40 and the output shaft 11. On the other hand, pigtail wires 36 from brushes 33 are welded to brush leads 27 having a wide surface area so that the circuit board 40 may be prevented from rising to a high temperature at the welding time.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: July 31, 2001
    Assignee: Kayaba Kogyo Kabushiki Kaisha
    Inventors: Hirokazu Wakao, Akira Endo, Takenobu Nakamura, Wataru Kawaguchi
  • Patent number: 6212089
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: April 3, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Patent number: 6160744
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: December 12, 2000
    Assignees: Hitachi, Ltd., Hitachi VSLI Engineering Corp.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Patent number: 6054239
    Abstract: A toner comprises toner particles which have been colored with a dye and have a volume mean diameter of several .mu.m, and to which silicone fine particles are externally added. A dry-development toner comprises resin particles having been colored with a dye, wherein the surfaces of resin particles are coated with a fine organic powder having a mean particle diameter of 0.8 .mu.m or less by means of mechanical impact force.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: April 25, 2000
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Hideo Ohira, Akira Endo
  • Patent number: 6049500
    Abstract: Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: April 11, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki, Yuji Sakai, Jiro Sawada, Yasunori Yamaguchi, Tetsurou Matsumoto, Shinji Udo, Hiroshi Yoshioka, Hirokazu Saito, Mitsuhiro Takano, Makoto Morino, Sinichi Miyatake, Eiji Miyamoto, Yasuhiro Kasama, Akira Endo, Ryoichi Hori, Jun Etoh, Masashi Horiguchi, Shinichi Ikenaga, Atsushi Kumata
  • Patent number: 6035960
    Abstract: A motorized power steering control device capable of reducing arrangement of an external wiring and simplifying a travel condition detecting unit, to thereby reduce a manufacturing cost of the device. A controller has an alternator pulsation detecting circuit and a power circuit arranged therein. The power circuit selectively controls a main voltage or a backup voltage to apply it to a control circuit. The control circuit operates an engine speed depending on a pulsation frequency of an alternator, to thereby actuate the power circuit to apply the main voltage to the control circuit when the engine speed is at a predetermined level or above and apply the backup voltage thereto when it is at the predetermined level or below.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: March 14, 2000
    Assignee: Kayaba Industry Co., Ltd.
    Inventors: Hirokazu Wakao, Yoshinori Kogiso, Akira Endo