Patents by Inventor Akira Fukunaga

Akira Fukunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080138508
    Abstract: A substrate processing method is useful for forming, by electroless plating, a protective film, such as a magnetic film, which covers exposed surfaces of embedded interconnects composed of an interconnect material, such as copper or silver, embedded in fine interconnect recesses provided in a surface of a substrate. The substrate processing method includes bringing a surface of a substrate into contact with a processing solution whose temperature is adjusted to not more than 15° C., thereby activating the surface, and bringing the activated surface of the substrate into contact with a plating solution, thereby forming a metal film on the surface.
    Type: Application
    Filed: March 6, 2006
    Publication date: June 12, 2008
    Inventors: Daisuke Takagi, Xinming Wang, Akira Owatari, Masanori Ishizaka, Akira Fukunaga
  • Patent number: 7374584
    Abstract: The present invention provides an interconnects-forming method and an interconnects-forming apparatus which can minimize the lowering of processing accuracy in etching, minimize light exposure processing for the formation of interconnect recesses in the production of multi-level interconnects, improve the electromigration resistance of interconnects without impairing the electrical properties of the interconnects, and enhance the reliability of the device.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: May 20, 2008
    Assignee: Ebara Corporation
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga
  • Publication number: 20080067679
    Abstract: A semiconductor device has interconnects protected with an alloy film having a minimum thickness necessary for producing the effect of preventing diffusion of oxygen, copper, etc., formed more uniformly over an entire surface of a substrate with less dependency to the interconnect pattern of the substrate. The semiconductor device includes, embedded interconnects, formed by filling an interconnect material into interconnect recesses formed in an electric insulator on a substrate, and an alloy film, containing 1 to 9 atomic % of tungsten or molybdenum and 3 to 12 atomic % of phosphorus or boron, formed by electroless plating on at least part of the embedded interconnects.
    Type: Application
    Filed: September 22, 2005
    Publication date: March 20, 2008
    Inventors: Daisuke Takagi, Xinming Wang, Akira Owatari, Akira Fukunaga, Akihiko Tashiro
  • Publication number: 20080047583
    Abstract: A substrate processing method can form highly-reliable interconnects with little current leakage between interconnects without causing significant damage to the interconnects. The substrate processing method comprises heating and reacting a contaminant on a substrate with a carboxylic acid in an atmosphere containing the carboxylic acid, thereby removing the contaminant.
    Type: Application
    Filed: December 28, 2005
    Publication date: February 28, 2008
    Inventors: Akira Fukunaga, Akira Susaki, Junko Mine, Xinming Wang
  • Publication number: 20080000776
    Abstract: A substrate processing method can securely form a metal film by electroless plating on an exposed surface of a base metal, such as interconnects, with increased throughput and without the formation of voids in the base metal. The substrate processing method includes: cleaning a surface of a substrate having a base metal formed in the surface with a cleaning solution comprising an aqueous solution of a carboxyl group-containing organic acid or its salt and a surfactant as an additive; bringing the surface of the substrate after the cleaning into contact with a processing solution comprising a mixture of the cleaning solution and a solution containing a catalyst metal ion, thereby applying the catalyst to the surface of the substrate; and forming a metal film by electroless plating on the catalyst-applied surface of the substrate.
    Type: Application
    Filed: August 29, 2007
    Publication date: January 3, 2008
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga, Akira Owatari, Yukiko Nishioka
  • Publication number: 20070289604
    Abstract: To provide an apparatus and a method capable of supplying a gas containing an evaporated reducing organic compound while strictly controlling the flow rate thereof to process a surface of a metal on a substrate without causing any deterioration of various types of films forming a semiconductor element with a simple apparatus configuration. The apparatus includes a process chamber 10 for keeping a substrate W therein, the process chamber 10 being gastight, an evacuation control system 20 for controlling the pressure in the process chamber 10, and a process gas supply system 30 for supplying a process gas containing a reducing organic compound to the process chamber 10.
    Type: Application
    Filed: April 27, 2005
    Publication date: December 20, 2007
    Inventors: Yukio Fukunaga, Akira Susaki, Junji Kunisawa, Hiroyuki Ueyama, Shohei Shima, Akira Fukunaga, Hideki Tateishi, Junko Mine
  • Publication number: 20070254558
    Abstract: A polishing apparatus (30) has a polishing surface (32), a top ring (36) for holding a wafer (W), motors (46, 56) to move the polishing surface (32) and the wafer (W) relative to each other at a relative speed, and a vertical movement mechanism (54) to press the wafer (W) against the polishing surface (32) under a pressing pressure. The polishing apparatus (30) also has a controller (44) to adjust a polishing condition in a non-Preston range in which a polishing rate is not proportional to a product of the pressing pressure and the relative speed. The polishing apparatus (30) can simultaneously achieve uniform supply of a chemical liquid to a surface of the wafer (W) and a uniform polishing rate within the surface of the wafer (W).
    Type: Application
    Filed: August 26, 2005
    Publication date: November 1, 2007
    Inventors: Masako Kodera, Yoshihiro Mochizuki, Akira Fukuda, Akira Kodera, Hirokuni Hiyama, Manabu Tsujimura, Kazuto Hirokawa, Akira Fukunaga
  • Patent number: 7285492
    Abstract: A substrate processing method can securely form a metal film by electroless plating on an exposed surface of a base metal, such as interconnects, with increased throughput and without the formation of voids in the base metal. The substrate processing method includes: cleaning a surface of a substrate having a base metal formed in the surface with a cleaning solution comprising an aqueous solution of a carboxyl group-containing organic acid or its salt and a surfactant as an additive; bringing the surface of the substrate after the cleaning into contact with a processing solution comprising a mixture of the cleaning solution and a solution containing a catalyst metal ion, thereby applying the catalyst to the surface of the substrate; and forming a metal film by electroless plating on the catalyst-applied surface of the substrate.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: October 23, 2007
    Assignee: Ebara Corporation
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga, Akira Owatari, Yukiko Nishioka, Tsuyoshi Sahoda
  • Publication number: 20070243797
    Abstract: A polishing method for polishing a workpiece using the chemical polishing process endpoint detecting technology is applicable to actual polishing processes and polishing apparatus. The polishing method including pressing the workpiece against a polishing surface of a polishing table, moving the workpiece and the polishing surface relatively to each other to polish the workpiece, and disposing a gas suction pipe having a gas inlet port, directly above the polishing surface, supplying an atmospheric gas from above the polishing surface through the gas inlet port to a gas detector via the gas suction pipe, and monitoring a particular gas contained in the atmospheric gas with the gas detector while the workpiece is being polished.
    Type: Application
    Filed: April 16, 2007
    Publication date: October 18, 2007
    Inventors: Akira Fukunaga, Noburu Shimizu, Shintaro Kamioka, Manabu Tsujimura
  • Publication number: 20070228569
    Abstract: The present invention provides an interconnects-forming method and an interconnects-forming apparatus which can minimize the lowering of processing accuracy in etching, minimize light exposure processing for the formation of interconnect recesses in the production of multi-level interconnects, improve the electromigration resistance of interconnects without impairing the electrical properties of the interconnects, and enhance the reliability of the device.
    Type: Application
    Filed: April 6, 2007
    Publication date: October 4, 2007
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga
  • Publication number: 20070205112
    Abstract: A polishing apparatus (30) has a polishing surface (32), a top ring (36) for holding a wafer (W), motors (46, 56) to move the polishing surface (32) and the wafer (W) relative to each other at a relative speed, and a vertical movement mechanism (54) to press the wafer (W) against the polishing surface (32) under a pressing pressure. The polishing apparatus (30) also has a controller (44) to adjust a polishing condition in a non-Preston range in which a polishing rate is not proportional to a product of the pressing pressure and the relative speed. The polishing apparatus (30) can simultaneously achieve uniform supply of a chemical liquid to a surface of the wafer (W) and a uniform polishing rate within the surface of the wafer (W).
    Type: Application
    Filed: May 3, 2007
    Publication date: September 6, 2007
    Inventors: Masako Kodera, Yoshihiro Mochizuki, Akira Fukuda, Akira Kodera, Hirokuni Hiyama, Manabu Tsujimura, Kazuto Hirokawa, Akira Fukunaga
  • Patent number: 7262849
    Abstract: A method for polishing a thin film formed on a substrate includes planarizing a thin film formed on a reference substrate by a CMP process such that the thin film remains on the reference substrate. After the planarizing, the thin film is cleaned, and then values of ? and ? with respect to the cleaned thin film are measured by ellipsometry. A physical property of the thin film is determined based on the ? and ? which have been measured by ellipsometry, and a polishing condition for an other substrate having a thin film to be polished is set based on physical property data which are obtained by the determining of the physical property.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: August 28, 2007
    Assignee: Ebara Corporation
    Inventors: Shohei Shima, Akira Fukunaga
  • Publication number: 20070141251
    Abstract: A solution containing a metal component of composite ultrafine metal particles each having a core substantially made of metal component and a covering layer made of an organic compound chemically bonded to the core having an average diameter ranging from 1 to 10 nm, uniformly dispersed in a solvent, forms a thin metal film on the surface of a transfer sheet, after which the transfer sheet is thermally decomposed to transfer the thin metal film to a substrate.
    Type: Application
    Filed: February 16, 2007
    Publication date: June 21, 2007
    Applicant: EBARA CORPORATION
    Inventors: Akira Fukunaga, Hiroshi Nagasawa, Takao Kato
  • Patent number: 7217653
    Abstract: The present invention provides an interconnects-forming method and an interconnects-forming apparatus which can minimize the lowering of processing accuracy in etching, minimize light exposure processing for the formation of interconnect recesses in the production of multi-level interconnects, improve the electromigration resistance of interconnects without impairing the electrical properties of the interconnects, and enhance the reliability of the device.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: May 15, 2007
    Assignee: Ebara Corporation
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga
  • Publication number: 20070099426
    Abstract: A polishing method polishes a substrate so as to remove an interconnect metal film and a barrier film formed on portions other than interconnect recesses. The method includes performing a first polishing process of polishing a surface of the substrate After performing the first polishing process, the surface of the substrate is cleaned. After cleaning, a second polishing process is performed for further polishing the surface of the substrate. At least one of performing the first polishing process and performing the second polishing process includes performing electrolytic polishing.
    Type: Application
    Filed: December 27, 2005
    Publication date: May 3, 2007
    Inventors: Manabu Tsujimura, Akira Fukunaga, Yutaka Wada, Itsuki Kobata
  • Patent number: 7179503
    Abstract: A solution containing a metal component of composite ultrafine metal particles each having a core substantially made of metal component and a covering layer made of an organic compound chemically bonded to the core having an average diameter ranging from 1 to 10 nm, uniformly dispersed in a solvent, forms a thin metal film on the surface of a transfer sheet, after which the transfer sheet, after which the transfer sheet is thermally decomposed to transfer the thin metal film to a substrate.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: February 20, 2007
    Assignee: Ebara Corporation
    Inventors: Akira Fukunaga, Hiroshi Nagasawa, Takao Kato
  • Patent number: 7055535
    Abstract: A holding unit holds a substrate to enable a surface of the substrate to be processed. The unit has a vacuum suction member that comes into contact with a peripheral portion of the surface of the substrate and sucks the substrate. A processing apparatus holds the wafer stably and allows an edge, a bevel portion and/or a back surface of the wafer to be processed.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: June 6, 2006
    Assignee: Ebara Corporation
    Inventors: Junji Kunisawa, Norio Kimura, Kenya Ito, Akira Fukunaga, Yuuki Inoue, Hiroshi Tomita, Soichi Nadahara, Motoyuki Sato
  • Publication number: 20060086618
    Abstract: An interconnects-forming method can form a film of interconnect material, having a sufficient adhesion, by electroplating uniformly on an entire surface of a substrate and thus can form highly-reliable embedded interconnects even when the design rule is strict, and which can remove an extra interconnect material at a lower pressure. The interconnects-forming method, including: forming a conductive film on a surface of a substrate having interconnect recesses formed in an insulating film, said conductive film being insoluble in an electrolytic plating solution for the formation of a film of an interconnect material; forming a film of the interconnect material by electroplating on a surface of the conductive film serving as a seed film while filling the interconnect recesses with the interconnect material; and removing an extra interconnect material of the film formed on the conductive film, thereby forming interconnects of the interconnect material embedded in the interconnect recesses.
    Type: Application
    Filed: October 21, 2005
    Publication date: April 27, 2006
    Inventors: Akira Fukunaga, Manabu Tsujimura
  • Publication number: 20060057839
    Abstract: A metal film-forming method of the present invention can form a metal film having different film qualities in the thickness direction, in a continuous manner using a single processing solution. The metal film-forming method including: providing a substrate having embedded interconnects formed in interconnect recesses provided in a surface of the substrate; and forming a metal film, having different film qualities in the thickness direction, on surfaces of the interconnects in a continuous manner by changing the flow state of a processing solution relative to the surface of the substrate while keeping the surface of the substrate in contact with the processing solution.
    Type: Application
    Filed: September 7, 2005
    Publication date: March 16, 2006
    Inventors: Xinming Wang, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga, Akira Owatari
  • Publication number: 20060003521
    Abstract: A damaged layer which is necessarily produced on the exposed surface of an interconnect by flattening of a surface of a substrate for forming interconnect according to a damascene process is restored, making it possible to manufacture semiconductor devices with a high yield. A semiconductor device is manufactured by preparing a substrate having an interconnect recess formed in ah interlevel dielectric, depositing an interconnect material on the surface of the substrate to embed the interconnect material in the interconnect recess, removing the interconnect material excessively formed on the surface of the substrate to flatten the surface of the substrate, thereby forming an interconnect of the interconnect material, and restoring a damaged layer formed on the exposed surface of the interconnect.
    Type: Application
    Filed: September 8, 2005
    Publication date: January 5, 2006
    Inventors: Akira Fukunaga, Manabu Tsujimura