Patents by Inventor Akira Iso

Akira Iso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071876
    Abstract: A semiconductor module includes an insulated circuit substrate including a semiconductor chip, an insulated circuit substrate including a wiring board provided on a front surface thereof, the wiring board having the semiconductor chip bonded thereto, a heat dissipation base having a front surface and a rear surface opposite to each other. The front surface has a substrate region to which the insulated circuit substrate is bonded. The rear surface has a heat dissipation region positioned overlapping the substrate region in a plan view of the semiconductor module and a loop-shaped region surrounding the heat dissipation region. The semiconductor module further includes a solid heat dissipation member made of a phase change material and provided on the rear surface of the heat dissipation base in the heat dissipation region, and an elastic member provided on the rear surface of the heat dissipation base in the loop-shaped region.
    Type: Application
    Filed: July 26, 2023
    Publication date: February 29, 2024
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Akira ISO
  • Publication number: 20230187320
    Abstract: A semiconductor module includes a semiconductor element, a case configured to house the semiconductor element, and a plurality of control terminal units. Each of the control terminal units includes at least one control terminal electrically connected to the semiconductor element, and a guide block constituted of a separate component from the case fixed integrally to the at least one control terminal. The at least one control terminal each includes a terminal pin part protruding from an outer wall surface of the case. Each of the guide blocks includes a guide pin part protruding from the outer wall surface of the case in a direction the same as the direction in which the terminal pin part protrudes. The guide blocks of the control terminal units are constituted of separate components.
    Type: Application
    Filed: October 28, 2022
    Publication date: June 15, 2023
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshinori ODA, Akira ISO
  • Publication number: 20230098854
    Abstract: A semiconductor device, including a board, a semiconductor module disposed on a front surface of the board, and a case that includes (1) side wall portions that are disposed on the front surface of the board and that surround, with the board, a storage area including the semiconductor module, (2) a cover portion that is disposed on the side wall portions to cover the storage area, the cover portion having a terminal opening formed therein, and (3) a guiding projection portion formed on an inner surface of the cover portion, and protruding toward the storage area. The semiconductor device further includes sealing material with which the storage area is filled and which seals the semiconductor module. The guiding projection portion has a projecting end portion that is in contact with the sealing material.
    Type: Application
    Filed: July 27, 2022
    Publication date: March 30, 2023
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Akira ISO
  • Patent number: 10262925
    Abstract: A semiconductor device includes a base plate to which a stacked substrate is bonded, the stacked substrate being mounted on a semiconductor chip. The semiconductor device further includes a heat sink mounted to the base plate, via thermal paste and a metal ring. A center hole of the metal ring is provided to face the semiconductor chip and the thermal paste fills the center hole. Further, the metal ring is formed using a material having about a same hardness as the heat sink, or a material having a lower hardness than the hardness of the heat sink.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: April 16, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Akira Iso
  • Publication number: 20180286788
    Abstract: A semiconductor device includes a base plate to which a stacked substrate is bonded, the stacked substrate being mounted on a semiconductor chip. The semiconductor device further includes a heat sink mounted to the base plate, via thermal paste and a metal ring. A center hole of the metal ring is provided to face the semiconductor chip and the thermal paste fills the center hole. Further, the metal ring is formed using a material having about a same hardness as the heat sink, or a material having a lower hardness than the hardness of the heat sink.
    Type: Application
    Filed: March 1, 2018
    Publication date: October 4, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Akira ISO
  • Patent number: 9905489
    Abstract: A semiconductor device is provided comprising a semiconductor element, a case portion housing the semiconductor element and having an opening end on at least some of wall portion, a lid portion covering the opening end of the case portion, and a sealing material sealing the semiconductor element inside the case portion, where a projection portion or a dent portion is provided on a surface of the wall portion close to the sealing material between the opening end and the sealing material. The Purpose is to prevent an oil leakage from a semiconductor device. Also, instead of the projection portion or the dent portion, a semiconductor device is provided with a liquid receiving portion that receives a liquid dripping from the opening end on a surface facing away from the sealing material.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: February 27, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Mitsumoto, Akira Iso
  • Publication number: 20170084508
    Abstract: A semiconductor device is provided comprising a semiconductor element, a case portion housing the semiconductor element and having an opening end on at least some of wall portion, a lid portion covering the opening end of the case portion, and a sealing material sealing the semiconductor element inside the case portion, where a projection portion or a dent portion is provided on a surface of the wall portion close to the sealing material between the opening end and the sealing material. The Purpose is to prevent an oil leakage from a semiconductor device. Also, instead of the projection portion or the dent portion, a semiconductor device is provided with a liquid receiving portion that receives a liquid dripping from the opening end on a surface facing away from the sealing material.
    Type: Application
    Filed: July 26, 2016
    Publication date: March 23, 2017
    Inventors: Takahiro MITSUMOTO, Akira ISO
  • Patent number: 9434028
    Abstract: Provided is a soldering method through nickel plating layer to reduce void occurrence rate and a method of manufacturing semiconductor device by using the soldering method. By heating a copper base plate having a nickel plating layer at a temperature range of 300° C. to 400° C. in an inert gas atmosphere beforehand, void occurrence rate can be reduced in soldering the copper base plate to an insulating circuit board.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: September 6, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Akira Iso
  • Publication number: 20140374470
    Abstract: Provided is a soldering method through nickel plating layer to reduce void occurrence rate and a method of manufacturing semiconductor device by using the soldering method. By heating a copper base plate having a nickel plating layer at a temperature range of 300° C. to 400° C. in an inert gas atmosphere beforehand, void occurrence rate can be reduced in soldering the copper base plate to an insulating circuit board.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 25, 2014
    Inventor: Akira ISO
  • Patent number: 8039045
    Abstract: An object of the present invention is to provide a plating method on a glass base plate. The method allows forming a plating film on a base plate composed of a glass material with excellent adhesivity and homogeneity by means of an electroless plating method even to a thickness of 1 ?m or more. Before forming a plating film by a step of electroless plating S6, a surface treatment process is conducted on a surface of the base plate composed of a glass material. The surface treatment process comprises at least a step of glass activation treatment S2 to increase quantity of silanol groups on the surface of the base plate at least by a factor of two using an aqueous solution of diluted acid, a step of silane coupling agent treatment S3, a step of palladium catalyst treatment S4, and a step of palladium bonding treatment S5.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: October 18, 2011
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Youichi Tei, Akira Iso, Kazuhito Higuchi, Hajime Kurihara, Hiroyuki Uwazumi
  • Patent number: 7622205
    Abstract: A disk substrate for a perpendicular magnetic recording medium is, disclosed. The substrate exhibits sufficient productivity, serves the function of a soft magnetic backing layer of the perpendicular magnetic recording medium, and scarcely generates noise. A perpendicular magnetic recording medium using such a substrate also is disclosed. The disk substrate comprises at least a soft magnetic underlayer formed on a nonmagnetic base plate by means of an electroless plating method. The thermal expansion coefficient of the soft magnetic underlayer is larger than a thermal expansion coefficient of the nonmagnetic disk-shaped base plate. A saturation magnetostriction constant ?s satisfies a relation ?s??1×10?5.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: November 24, 2009
    Assignee: Fuji Electric Device Technology Co. Ltd.
    Inventors: Hiroyuki Uwazumi, Youichi Tei, Kengo Kainuma, Kazuhito Higuchi, Akira Iso, Hajime Kurihara
  • Patent number: 7514118
    Abstract: A method of plating on a glass substrate allowing an electroless plating film with good adhesiveness to be formed by chemically bonding a silane coupling agent in a state of simple adhesion or hydrogen bond to the surface of the glass substrate through dehydration condensation reaction, and a method of manufacturing a magnetic recording medium using the plating method. In the plating method, electroless plating is performed on a glass substrate after sequentially conducting at least the adhesion layer formation that forms an adhesion layer using a silane coupling agent solution, catalyst layer formation, a catalyst activation, and a drying that chemically bonds the silane coupling agent in the adhesion layer to the surface of the glass substrate.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: April 7, 2009
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Akira Iso, Youichi Tei
  • Patent number: 7399386
    Abstract: A magnetic recording medium using a plastic substrate as a non-magnetic substrate includes an adhesive layer that prevents film expansion even under severe conditions. The adhesive layer has a chemical affinity to the plastic substrate and is formed on the surface of the plastic substrate, and an underlayer and subsequent layers are formed over the adhesive layer. A polymerized carbon film is used as the adhesive layer.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: July 15, 2008
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Akira Iso, Makoto Isozaki
  • Patent number: 7160571
    Abstract: A method of manufacturing a magnetic recording medium facilitates preventing a film inflation from occurring in an environmental condition range between ?40° C. and 80° C. and an 80% relative humidity. The magnetic recording medium includes a plastic substrate and an undercoating layer on the plastic substrate. The undercoating layer is provided with a columnar structure, which prevents water (moisture) between the plastic substrate and the undercoating layer from aggregating and, therefore, the film inflation from occurring.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: January 9, 2007
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Akira Iso, Hiroyuki Uwazumi, Takahiro Shimizu, Naoki Takizawa, Miyabi Nakamura
  • Publication number: 20060228493
    Abstract: A plating method on a glass base plate is disclosed. The method allows an electroless plating film to be formed on a base plate composed of a glass material with excellent adhesivity through a process that removes alkaline and alkaline earth metals on the surface of the base plate. Also disclosed is a method of manufacturing a magnetic recording medium employing the method of plating on a glass base plate. Before forming a plating film in a step of electroless plating, a series of surface treatments are conducted on the surface of the base plate composed of a glass material. The series of surface treatments comprises at least an ultraviolet light irradiation, an etching treatment, an adhesion layer formation treatment, a catalyst layer formation treatment, and a catalyst activation treatment.
    Type: Application
    Filed: March 13, 2006
    Publication date: October 12, 2006
    Applicant: Fuji Electric Device Technology Co., Ltd.
    Inventors: Akira Iso, Youichi Tei, Hajime Kurihara
  • Publication number: 20060210837
    Abstract: A method of plating on a glass base plate is disclosed. The method allows a plating film to be formed on a base plate composed of a glass material with excellent adhesivity and homogeneity by means of an electroless plating method, even to a thickness of 1 ?m or more. Before forming the plating film by electroless plating, a series of surface treatments are conducted on the surface of the base plate composed of a glass material. The surface treatments comprises at least a glass activation treatment, a silane coupling agent treatment, a palladium catalyst treatment, a palladium bonding treatment, ab electroless plating to form a preliminary plating film having a thickness in the range of 0.02 ?m to 0.5 ?m, and an annealing at a temperature in the range of 200° C. to 350° C.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 21, 2006
    Applicant: Fuji Electric Device
    Inventors: Hajime Kurihara, Youichi Tei, Akira Iso
  • Patent number: D704670
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: May 13, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Shuangching Chen, Akira Iso, Takashi Hyakutake, Syougo Ogawa, Syuuji Miyashita
  • Patent number: D704671
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: May 13, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Shuangching Chen, Akira Iso, Takashi Hyakutake, Syougo Ogawa, Syuuji Miyashita
  • Patent number: D710318
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: August 5, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Shuangching Chen, Akira Iso, Takashi Hyakutake, Syougo Ogawa, Syuuji Miyashita
  • Patent number: D710319
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: August 5, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Shuangching Chen, Akira Iso, Takashi Hyakutake, Syougo Ogawa, Syuuji Miyashita