Patents by Inventor Akira Kageyama

Akira Kageyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100026683
    Abstract: Grid structured data arranged for a spherical structured grid constituted by combining two component structured grids are visualized by using computer graphics technology. Coordinate conversion means 31 converts grid point coordinates of first and second component structured grids (referred to as N and E systems, respectively), represented by specific regions in spherical coordinates, into local xyz coordinates used in computer graphics. Filter means 32 obtains first and second graphic objects for the N and E systems, respectively. Using E system rotation and N and E system synthesis means 33, the second graphic object for the E system is rotated by 90 degrees with respect to an x axis of a first local xyz coordinate system, and is then rotated by 180 degrees with respect to a z axis of the first local xyz coordinate system, thereby obtaining the rotated second graphic object for the E system, and then, both of the graphic objects are synthesized.
    Type: Application
    Filed: March 30, 2006
    Publication date: February 4, 2010
    Applicant: Japan Agency for Marine-Earth Science and Technology
    Inventors: Fumiaki Araki, Akira Kageyama
  • Publication number: 20080290529
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250 ° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: June 13, 2008
    Publication date: November 27, 2008
    Applicant: Hitachi Chemical Co., Ltd.
    Inventors: Shinji TAKEDA, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 7387914
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: June 17, 2008
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20060180903
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: April 24, 2006
    Publication date: August 17, 2006
    Applicant: Hitachi Chemical Co., Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 7078094
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: July 18, 2006
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 7057265
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: May 2, 2003
    Date of Patent: June 6, 2006
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 7012320
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: March 14, 2006
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 6855579
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: February 15, 2005
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20040253770
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250 ° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 16, 2004
    Applicant: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 6825249
    Abstract: Provided are a laminating method and machine for successively heating and compression-bonding a film-shaped organic die-bonding material on a leadframe. leadframe 7 is placed on a travelling table 8 and is heated there. A film-shaped organic die-bonding material 2 is punched out and the resulting film is tack-bonded to a die pad on the leadframe. The leadframe with the film tack-bonded thereon is then moved to a position B by the travelling table. After the film is pressed by a compression-bonding element at the position B, a chip is mounted on the film-shaped organic die-bonding material 2. It is therefore possible to bond a film-shaped organic die-bonding material under compression on a leadframe with good productivity but without voids and further to avoid package cracking upon mounting a chip.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: November 30, 2004
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Yasuo Miyadera, Mituo Yamasaki, Iwao Maekawa, Akio Kotato, Yuusuke Miyamae, Tadaji Satou, Makoto Saitou, Tooru Kikuchi, Akira Kageyama, Aizou Kaneda
  • Patent number: 6717242
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 Mpa or less at a temperature of 259° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: April 6, 2004
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 6621170
    Abstract: The present invention aims at an improvement in temperature-cycle resistance after packaging in semiconductor devices and also an improvement in moisture-absorbed reflow resistance, and provides an adhesive having a storage elastic modulus at 25° C. of from 10 to 2,000 MPa and a storage elastic modulus at 260° C. of from 3 to 50 MPa as measured with a dynamic viscoelastic spectrometer, and also a double-sided adhesive film, a semiconductor device and a semiconductor chip mounting substrate which make use of the adhesive, and their production process.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: September 16, 2003
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Kazunori Yamamoto, Yasushi Shimada, Yasushi Kumashiro, Teiichi Inada, Hiroyuki Kuriya, Aizo Kaneda, Takeo Tomiyama, Yoshihiro Nomura, Yoichi Hosokawa, Hiroshi Kirihara, Akira Kageyama
  • Publication number: 20030160337
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: May 2, 2003
    Publication date: August 28, 2003
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20020151659
    Abstract: The present invention is to provide a resin composition excellent in moisture absorption property, heat resistance, adhesive property and electric characteristics, and excellent in molding property, and suitable for an insulating material such as a multilayer wiring substrate, electronic parts, etc., and an adhesive film.
    Type: Application
    Filed: October 7, 1999
    Publication date: October 17, 2002
    Inventors: MASAHIRO SUZUKI, SHIN NISHIMURA, MASAO SUZUKI, AKIO TAKAHASHI, AKIRA KAGEYAMA, YOSHIHIKO HONDA, TOSHIYASU KAWAI, SHINJI IIOKA, YOSHIHIRO NOMURA
  • Patent number: 6462148
    Abstract: A resin composition useful as an adhesive film and insulating material for a multilayer wiring substrate or electronic parts comprises (A) a polymer containing a quinoline ring represented by the formula (1) in the structure such as 6,6′-bis(2-(4-fluorophenyl)-4-phenylquinoline) and 4,4′-(1,1,1,3,3,3-hexafluoro-2,2-propylidene)bisphenol, and (B) a bismaleimide compound represented by the formula (2) such as 2,2-bis((4-maleimidophenoxy)phenyl)propane.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: October 8, 2002
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Masahiro Suzuki, Shin Nishimura, Masao Suzuki, Akio Takahashi, Akira Kageyama, Yoshihiko Honda, Toshiyasu Kawai, Shinji Iioka, Yoshihiro Nomura
  • Patent number: 6404068
    Abstract: A paste composition which comprises as essential ingredients (A) a thermoplastic resin, (B) an epoxy resin, (C) a coupling agent, (D) a powdery inorganic filler, (E) a powder having rubber elasticity and (F) an organic solvent and which, when applied and dried, gives a coating film having a void content of 3% by volume or higher and a water vapor permeability as measured at 40° C. and 90 %RH of 500 g/m2·24 h or less; a protective film which is formed by applying the paste composition to a surface of a semiconductor part and drying it and has a void content of 3% by volume or higher and a water vapor permeability as measured at 40° C. and 90%RH of 500 g/m2·24 h or less; and a semiconductor device having the protective film.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: June 11, 2002
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Toshiaki Tanaka, Takafumi Dohdoh, Tsutomu Kitakatsu, Aizou Kaneda, Masaaki Yasuda, Takashi Kousaka, Akira Kageyama
  • Publication number: 20010035533
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: February 20, 2001
    Publication date: November 1, 2001
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20010022404
    Abstract: The present invention aims at an improvement in temperature-cycle resistance after packaging in semiconductor devices and also an improvement in moisture-absorbed reflow resistance, and provides an adhesive having a storage elastic modulus at 25° C. of from 10 to 2,000 MPa and a storage elastic modulus at 260° C. of from 3 to 50 MPa as measured with a dynamic viscoelastic spectrometer, and also a double-sided adhesive film, a semiconductor device and a semiconductor chip mounting substrate which make use of the adhesive, and their production process.
    Type: Application
    Filed: April 26, 2001
    Publication date: September 20, 2001
    Applicant: Hitachi Chemical Company Ltd.
    Inventors: Kazunori Yamamoto, Yasushi Shimada, Yasushi Kumashiro, Teiichi Inada, Hiroyuki Kuriya, Aizo Kaneda, Takeo Tomiyama, Yoshihiro Nomura, Yoichi Hosokawa, Hiroshi Kirihara, Akira Kageyama
  • Publication number: 20010016384
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: February 20, 2001
    Publication date: August 23, 2001
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20010009780
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: February 20, 2001
    Publication date: July 26, 2001
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikiuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda