Abstract: The invention relates to a BIMOS logic gate comprising: a bipolar transistor; and depletion type MOS transistors whose sources are connected to a base of the bipolar transistor or MOS transistors having a threshold voltage smaller than that of MOS transistors constructing another complementary type logic circuit. A current of the bipolar transistor flows at an input voltage lower than that of the related art BIMOS logic gate and the current can be cut off by an input voltage which is equal to that of the ordinary complementary type logic circuit. Thus, the gate operates at a low electric power and can operate at a high speed at a low power source voltage.

Abstract: A serial-parallel type a/d converter comprises first comparators whose one input is supplied with an input signal, for producing upper-digit signals; a circuit for supplying first different potentials determined according to arithmetic progression with respect to a reference potential to respective another input of the first comparators when the control signal is of first state, and for producing N-1 second different potentials with difference 1/N of voltage difference of first potentials over potential P (N, P: natural numbers) given by the upper-digit signals when the control signal is of second state; and N-1 second comparators whose one input is supplied with the input signal and another input is supplied with the respective second different potentials for producing lower-digit signals.

Abstract: A parallel type A/D converter includes circuitry for generating plural reference voltages, comparators for comparing the plural reference voltages with an input voltage, logic circuits for logically processing the outputs of comparators, and an encoder circuit for encoding the outputs from the logic circuits. A pair of logic outputs are obtained by a first logic circuit chain for receiving as inputs the outputs of a comparator of number i and of a comparator i+2. Conversion errors are reduced by properly processing this pair of logic outputs in a second logic circuit, or by composing an encoder circuit for receiving the pair of logic outputs as inputs.

Abstract: A serial-type analog-to-digital converter includes a plurality of serially connected folding circuits. Each folding circuit includes a first operational amplifier having an inverting input connected to an input terminal, and a second operational amplifier having a noninverting input connected to the input terminal. The bases of first and second transistors are respectively connected to the outputs of the first and second operational amplifiers. The emitters of the transistors are commonly connected to an output terminal. Feedback connections are provided for coupling the output terminal to the inverting input of each operational amplifier. Furthermore, circuitry is provided for calculating an estimated offset error based on maximum values of a folded analog signal provided at an output terminal of one of the folding circuits.

Abstract: A tool changer has a rotatably supported driving shaft, a cylindrical double-walled support member composed of an inner cylindrical wall and an outer cylindrical wall, disposed coaxially with the driving shaft, and engaged therewith through helical splines, a cylindrical guide member having a cylindrical portion interposed between the inner cylindrical wall and outer cylindrical wall, a plurality of claw members fixed to the outer cylindrical wall for retaining tools, and a servomotor for rotating the driving shaft clockwise and counterclockwise. In an outer periphery of the cylindrical portion of the guide member are formed a plurality of axially extending straight grooves, each having an inclined side surface at respective tip ends, which extends in one direction, and an engaging member biassed by a spring member projects into one of the straight grooves so as to be engaged therewith.

Abstract: In making a vertical bipolar transistors, after forming by diffusion process a region to become inactive base region an oxide film is selectively formed on the region, thereafter an ion implantation is carried out to produce regions which become the active base region and emitter region by using the oxide film; thereby such a configuration is formed so that defect part (108) induced at the time of the ion implantation is confined in the emitter region, thereby minimizing the leakage current at the PN junction, and hence assuring production of high performance and high reliability semiconductor devices; further, a high integration is attained by adopting self-alignment in forming emitter contact.

Abstract: A parallel type analog-digital converter having a plural number (1023) of comparators, a first voltage divider comprising a plural number (1023) of resistors (R.sub.1 to R.sub.1023) connected in series across positive and negative terminals of a power source thereby feeding reference voltages from the junction points to the comparators, the apparatus further comprisesa second voltage divider comprising a second plural number (8) of resistors (r.sub.1, r.sub.2 . . . r.sub.8) connected in series across the voltage feeding terminals thereby feeding input voltages to input terminals of the current amplifiers D.sub.1, D.sub.2 . . . D.sub.8, the output of which is given to the corresponding junction points of the first voltage divider, thereby to equalize voltages of said first voltage divider with voltages of corresponding junction points of said second voltage divider.