Patents by Inventor Akira Morita
Akira Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240331598Abstract: A control circuit couples a test capacitance element Cp and a node Test to a capacitance element Cm1-1 to be tested, and applies a voltage output from an operational amplifier circuit to the capacitance elements Cm1-1 and Cp and the node Test. Thereafter, the capacitance element Cp and the node Test are decoupled from the capacitance element Cm1-1 to be tested, the capacitance element and the node Test are coupled to the capacitance element Cm1-1, the charge accumulated in the capacitance element Cm1-1 is moved, a voltage Vref of a negative input-end (?) of a comparison circuit is set, and the capacitance element Cm1-1 is tested based on a signal output from the comparison circuit.Type: ApplicationFiled: March 28, 2024Publication date: October 3, 2024Applicant: SEIKO EPSON CORPORATIONInventors: Shinya UKAI, Akira MORITA
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Patent number: 12106731Abstract: A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier, an output capacitor, a first feedback capacitor, and a second feedback capacitor. One end of the output capacitor is coupled to an output node of the computation amplifier, and the other end is coupled to the signal supply line. One end of the first feedback capacitor is coupled to an inverting input node of the computation amplifier, and the other end is coupled to the signal supply line. One end of the second feedback capacitor is coupled to the inverting input node of the computation amplifier, and the other end is coupled to a predetermined potential node. At least one of the first feedback capacitor and the second feedback capacitor is a capacitor with a variable capacitance value.Type: GrantFiled: June 12, 2023Date of Patent: October 1, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Akira Morita, Ryota Bansho
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Publication number: 20240264195Abstract: An ultrasonic time measurement device measures a propagation time of a measurement wave transmitted from a first sensor to a second sensor. The device includes a transmission circuit that causes the first sensor to repeatedly transmit measurement waves one at a time and a reception circuit that detects reception at the second sensor, of the respective measurement wave transmitted from the first sensor. The device further measures elapsed times for the measurement waves, each of the elapsed times being an elapsed time from a reference time to a reception time of the respective measurement wave received by the second sensor and calculate the propagation time of the measurement wave from the first sensor to the second sensor based on the elapsed times measured by the time measurer.Type: ApplicationFiled: December 27, 2023Publication date: August 8, 2024Applicant: FUJI ELECTRIC CO., LTD.Inventors: Akira MORITA, Hojun YAMAUCHI, Yasuyuki MASUNAGA, Kazuhiro KOIZUMI, Masami KISHIRO, Hideo KANAI, Shiori YAMASHITA
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Publication number: 20240200618Abstract: A cam clutch unit includes a plurality of cams and a plurality of rollers disposed so as to be aligned in a circumferential direction between an inner ring and an outer ring, a cage ring having a plurality of pocket portions which regulate relative movement in a circumferential direction of the cam and the roller, and an annular spring which urges the cam, in which the cam has an engagement stepped portion capable of engagement with the spring, the cage ring has an end-part circumferential annular portion continuing in the circumferential direction on an end surface in the axial direction, the pocket portion regulates movement of the roller to the outer ring side and the inner ring side and has a claw portion capable of insertion of the roller from the outer ring side or the inner ring side by elastic deformation.Type: ApplicationFiled: November 2, 2023Publication date: June 20, 2024Applicant: TSUBAKIMOTO CHAIN CO.Inventors: Akira Morita, Riku Kato, Hirokazu Tsuneda
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Publication number: 20240200619Abstract: A cam clutch unit which can receive an axial load in a small space without increasing rigidity of a cage ring or disposing another member is provided. The cam clutch unit includes a plurality of cams 130 and a plurality of rollers 140 disposed so as to be aligned in a circumferential direction between an inner ring and an outer ring, a cage ring 150 having a plurality of pocket portions 151, 152 which regulate relative movement in a circumferential direction of the cam 130 and the roller 140, and an annular spring 160 which urges the cam 130, in which the roller 140 has a part protruding in an axial direction more than the cage ring 150 when being held by the cage ring 150.Type: ApplicationFiled: November 10, 2023Publication date: June 20, 2024Applicant: TSUBAKIMOTO CHAIN CO.Inventors: Akira MORITA, Tadashi MURAKAMI, Hirokazu TSUNEDA
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Patent number: 11996060Abstract: A display system includes a data processing unit and a liquid crystal panel. The data processing unit partitions display data pixels in one frame into, for example, blocks of four pixels in two rows×two columns, performs predetermined processing on display data of four display data pixels, and transmits processing data with an amount of data of ¼ pixels to the liquid crystal panel in four subframes. Panel pixels of the liquid crystal panel are partitioned into blocks of four pixels in two rows×two columns, data signals based on processing data are provided to four panel pixels included in one block in a subframe f1 among the four subframes, and of the four subframes, in subframes f2 to f4, data signals based on the processing data are provided in a predetermined order to three of the panel pixels included in the one block.Type: GrantFiled: March 7, 2022Date of Patent: May 28, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Kota Mochizuki, Akira Morita
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Patent number: 11996061Abstract: A driver includes a data voltage output terminal, a capacitor drive circuit that outputs each of first to n-th capacitor drive voltages corresponding to gradation data to a respective one of first to n-th capacitor driving nodes, a capacitor circuit including first to n-th capacitors each provided between an output node and a respective one of the first to n-th capacitor driving nodes, a processing circuit that generates a correction signal for correcting a voltage difference between an output voltage and a target voltage corresponding to the gradation data, and a correction circuit that corrects the voltage difference with a correction voltage corresponding to the voltage difference by injecting a charge corresponding to the correction signal into the output node or discharging the charge from the output node by using the correction capacitor circuit.Type: GrantFiled: March 28, 2023Date of Patent: May 28, 2024Assignee: SEIKO EPSON CORPORATIONInventors: Ryota Bansho, Akira Morita
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Patent number: 11982324Abstract: To provide a cam clutch unit that is easy to handle before assembly, with its components prevented from lifting or detachment, and that allows production with fewer machining steps and a lower level of difficulty, while also enabling unit thickness reduction. The cam clutch unit of the present invention includes: a plurality of cams arranged between an inner race and an outer race; a cage ring having a plurality of pocket portions that restrict relative circumferential movements of the cams; and an annular spring that biases the cams. The cams have an engagement step adapted to engage with the spring on one axial end face. The cage ring has a plurality of hook portions that restrict an axial movement of the annular spring. The hook portions have a pressing part that allows the spring to press the cams towards the other axial end.Type: GrantFiled: July 14, 2023Date of Patent: May 14, 2024Assignee: TSUBAKIMOTO CHAIN CO.Inventors: Akira Morita, Hirokazu Tsuneda, Yuji Kurematsu
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Publication number: 20240102520Abstract: To provide a cam clutch unit that is easy to handle before assembly, with its components prevented from lifting or detachment, and that allows production with fewer machining steps and a lower level of difficulty, while also enabling unit thickness reduction. The cam clutch unit of the present invention includes: a plurality of cams arranged between an inner race and an outer race; a cage ring having a plurality of pocket portions that restrict relative circumferential movements of the cams; and an annular spring that biases the cams. The cams have an engagement step adapted to engage with the spring on one axial end face. The cage ring has a plurality of hook portions that restrict an axial movement of the annular spring. The hook portions have a pressing part that allows the spring to press the cams towards the other axial end.Type: ApplicationFiled: July 14, 2023Publication date: March 28, 2024Applicant: TSUBAKIMOTO CHAIN CO.Inventors: Akira Morita, Hirokazu Tsuneda, Yuji Kurematsu
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Publication number: 20230410764Abstract: A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier, an output capacitor, a first feedback capacitor, and a second feedback capacitor. One end of the output capacitor is coupled to an output node of the computation amplifier, and the other end is coupled to the signal supply line. One end of the first feedback capacitor is coupled to an inverting input node of the computation amplifier, and the other end is coupled to the signal supply line. One end of the second feedback capacitor is coupled to the inverting input node of the computation amplifier, and the other end is coupled to a predetermined potential node. At least one of the first feedback capacitor and the second feedback capacitor is a capacitor with a variable capacitance value.Type: ApplicationFiled: June 12, 2023Publication date: December 21, 2023Applicant: SEIKO EPSON CORPORATIONInventors: Akira MORITA, Ryota BANSHO
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Publication number: 20230410762Abstract: A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier made up of a transistor with a breakdown voltage lower than a breakdown voltage of a transistor making up the first driving circuit, an output capacitor disposed between an output node of the computation amplifier and a signal supply line, and a first feedback capacitor disposed between an inverting input node of the computation amplifier and the signal supply line. The second driving circuit includes first to m-th voltage outputting capacitors including one end coupled to the inverting input node of the computation amplifier, and first to m-th voltage output circuits configured to output a voltage based on the gradation data to the other end of the first to m-th voltage outputting capacitors.Type: ApplicationFiled: June 12, 2023Publication date: December 21, 2023Applicant: SEIKO EPSON CORPORATIONInventors: Akira MORITA, Ryota BANSHO
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Publication number: 20230410763Abstract: A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier, an output capacitor, a first feedback capacitor, and a second feedback capacitor. The computation amplifier is composed of a transistor with a breakdown voltage lower than the breakdown voltage of a transistor making up the first driving circuit. The output capacitor is disposed between an output node of the computation amplifier and the signal supply line. The first feedback capacitor is disposed between an inverting input node of the computation amplifier and the signal supply line. One end of the second feedback capacitor is coupled to the inverting input node of the computation amplifier.Type: ApplicationFiled: June 12, 2023Publication date: December 21, 2023Applicant: SEIKO EPSON CORPORATIONInventors: Akira MORITA, Chihiro Shin
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Publication number: 20230317025Abstract: A driver includes a data voltage output terminal electrically coupled to a data line through a data line switch of an electro-optical panel, a capacitor driving circuit configured to output first to nth capacitor driving voltages corresponding to gradation data to first to nth capacitor driving nodes, a capacitor circuit including first to nth capacitors provided between an output node and the first to nth capacitor driving nodes, a processing circuit configured to calculate an excess/deficient charge amount of the output node when the data line switch is turned on, and a charge compensation circuit configured to inject into the output node or discharge from the output node a compensation charge based on the excess/deficient charge amount calculated by the processing circuit, by using a charge compensation capacitor circuit.Type: ApplicationFiled: March 28, 2023Publication date: October 5, 2023Applicant: SEIKO EPSON CORPORATIONInventors: Akira MORITA, Chihiro SHIN
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Publication number: 20230306923Abstract: A driver includes a data voltage output terminal, a capacitor drive circuit that outputs each of first to n-th capacitor drive voltages corresponding to gradation data to a respective one of first to n-th capacitor driving nodes, a capacitor circuit including first to n-th capacitors each provided between an output node and a respective one of the first to n-th capacitor driving nodes, a processing circuit that generates a correction signal for correcting a voltage difference between an output voltage and a target voltage corresponding to the gradation data, and a correction circuit that corrects the voltage difference with a correction voltage corresponding to the voltage difference by injecting a charge corresponding to the correction signal into the output node or discharging the charge from the output node by using the correction capacitor circuit.Type: ApplicationFiled: March 28, 2023Publication date: September 28, 2023Applicant: SEIKO EPSON CORPORATIONInventors: Ryota BANSHO, Akira MORITA
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Patent number: 11768255Abstract: An integrated circuit includes a capacitance element to be tested and a test circuit in the same semiconductor substrate, the test circuit includes a capacitance element for testing, and a comparison circuit for comparing a voltage of a node with a voltage of a signal, electrically connects another end of the capacitance element to be tested to the node, applies the voltage of the signal to the node in a first period, changes the voltage of the node based on a capacitance ratio of the capacitance element to be tested and the capacitance element for testing, and tests a capacity size of the capacitance element to be tested based on a comparison result of the comparison circuit in a second period after the first period.Type: GrantFiled: January 27, 2022Date of Patent: September 26, 2023Assignee: SEIKO EPSON CORPORATIONInventors: Akira Morita, Shinya Ukai
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Publication number: 20230115992Abstract: The problem of providing an oil and fat for chocolate products and a chocolate product each having oil and fat migration/blooming resistance and post-tempering thickening resistance can be solved by an oil and fat for chocolate products according to the present invention, an oil or fat for chocolate products according to the present invention which is obtained by mixing an oil and fat mainly composed of a StOSt triglyceride with a low-melting-point fraction of palm oil that serving as a liquid oil component and further contains a specific amount of an OStO component.Type: ApplicationFiled: January 28, 2021Publication date: April 13, 2023Applicant: FUJI OIL HOLDINGS INC.Inventor: Akira MORITA
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Publication number: 20230060352Abstract: Systems and methods for improved fluid dispensing process control using a machine learning tool are disclosed. In an example method, successive portions of viscous fluid are dispensed by a dispensing device according to operating parameters to train a machine learning tool to associate defect classifications with images of dispensed portions and/or operating parameters associated with dispensing the dispensed portions. The trained machine learning tool is then used in a closed loop fashion in production to detect and correct for defects associated with the dispensed portions to improve quality and production efficiency.Type: ApplicationFiled: February 19, 2021Publication date: March 2, 2023Inventors: Alan R. LEWIS, Cutler CROWELL, III, Michael GORMAN, Akira MORITA
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Publication number: 20220284868Abstract: A display system includes a data processing unit and a liquid crystal panel. The data processing unit partitions display data pixels in one frame into, for example, blocks of four pixels in two rows×two columns, performs predetermined processing on display data of four display data pixels, and transmits processing data with an amount of data of 1?4 pixels to the liquid crystal panel in four subframes. Panel pixels of the liquid crystal panel are partitioned into blocks of four pixels in two rows×two columns, data signals based on processing data are provided to four panel pixels included in one block in a subframe f1 among the four subframes, and of the four subframes, in subframes f2 to f4, data signals based on the processing data are provided in a predetermined order to three of the panel pixels included in the one block.Type: ApplicationFiled: March 7, 2022Publication date: September 8, 2022Applicant: SEIKO EPSON CORPORATIONInventors: Kota MOCHIZUKI, Akira MORITA
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Publication number: 20220236340Abstract: An integrated circuit includes a capacitance element to be tested and a test circuit in the same semiconductor substrate, the test circuit includes a capacitance element for testing, and a comparison circuit for comparing a voltage of a node with a voltage of a signal, electrically connects another end of the capacitance element to be tested to the node, applies the voltage of the signal to the node in a first period, changes the voltage of the node based on a capacitance ratio of the capacitance element to be tested and the capacitance element for testing, and tests a capacity size of the capacitance element to be tested based on a comparison result of the comparison circuit in a second period after the first period.Type: ApplicationFiled: January 27, 2022Publication date: July 28, 2022Applicant: SEIKO EPSON CORPORATIONInventors: Akira MORITA, Shinya UKAI
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Patent number: 11302232Abstract: A circuit device configured to drive an electro-optical panel including a demultiplexer provided between a first to n-th data lines, n being an integer of three or greater, and a data signal supply line, includes a data line driving circuit configured to output a data signal to the data signal supply line, and a processing circuit configured to set a selection order, by the demultiplexer, of the first to n-th data lines. When an i-th data line, i being an integer of 1 to n, is selected j-th, j being an integer of 1 to n, in the first selection order, the processing circuit sets a second selection order using random number information so as to prohibit the i-th data line from being selected j-th in the second selection order.Type: GrantFiled: January 15, 2021Date of Patent: April 12, 2022Assignee: SEIKO EPSON CORPORATIONInventors: Fukukai Ryu, Akira Morita