Patents by Inventor Akira Morita

Akira Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11403944
    Abstract: The present application is such that, in order to prevent communication disruption caused by a change in the situation of wireless communication due to the distance between a roadway instrument and a self-vehicle, a vehicle wireless communication device includes a communication section; a control section which controls the reception in the communication section; a position detection section which detects the position of a roadway instrument; and a running direction detection section which detects the running direction of a self-vehicle, wherein the communication section, based on the roadway instrument position detected by the position detection section and on the self-vehicle running direction detected by the running direction detection section, receives information from a roadway instrument next closest to a roadway instrument carrying out communication.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: August 2, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayoshi Takehara, Akira Hirata, Keisuke Morita
  • Publication number: 20220236340
    Abstract: An integrated circuit includes a capacitance element to be tested and a test circuit in the same semiconductor substrate, the test circuit includes a capacitance element for testing, and a comparison circuit for comparing a voltage of a node with a voltage of a signal, electrically connects another end of the capacitance element to be tested to the node, applies the voltage of the signal to the node in a first period, changes the voltage of the node based on a capacitance ratio of the capacitance element to be tested and the capacitance element for testing, and tests a capacity size of the capacitance element to be tested based on a comparison result of the comparison circuit in a second period after the first period.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 28, 2022
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akira MORITA, Shinya UKAI
  • Publication number: 20220228818
    Abstract: In a heat exchanger, an outer diameter of a plurality of heat transfer pipes is defined as Do, a wall thickness is defined as tP, an area represented by a numerical expression of a row pitch L1×a step pitch L2 is defined as A, and an area represented by a numerical expression of ((Do?2×tP)/2)2×? is defined as B, a relation of Do<5.5 mm, a relation of (0.0219×tP2?0.0185×tP+0.0043)×ln(Do)+(1.6950×tP2+1.8455×tP+1.5416)?B/A?(0.2076×tP2?0.1480×tP+0.0545)×Do{circumflex over (?)}(?0.0021×tP2?0.0528×tP+0.0164), and a relation of B/A<0.0076×tP2?0.0417×tP+0.0574 are satisfied.
    Type: Application
    Filed: August 6, 2019
    Publication date: July 21, 2022
    Inventors: Akira YATSUYANAGI, Tsuyoshi MAEDA, Akira ISHIBASHI, Atsushi MORITA, Shin NAKAMURA
  • Patent number: 11302232
    Abstract: A circuit device configured to drive an electro-optical panel including a demultiplexer provided between a first to n-th data lines, n being an integer of three or greater, and a data signal supply line, includes a data line driving circuit configured to output a data signal to the data signal supply line, and a processing circuit configured to set a selection order, by the demultiplexer, of the first to n-th data lines. When an i-th data line, i being an integer of 1 to n, is selected j-th, j being an integer of 1 to n, in the first selection order, the processing circuit sets a second selection order using random number information so as to prohibit the i-th data line from being selected j-th in the second selection order.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: April 12, 2022
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Fukukai Ryu, Akira Morita
  • Publication number: 20220087361
    Abstract: A rubber foam for a shoe sole is composed of a rubber composition for foaming containing a rubber composition and a foaming agent, the rubber foam having (i) a loss factor tan ? (24° C.) at a frequency of 10 Hz and 24° C. that is 0.07 or less and (ii) an absolute value of a slope of a change in loss factor tan ? with temperature between a loss factor tan ? (?15° C.) at the frequency of 10 Hz and ?15° C. and the loss factor tan ? (24° C.) at the frequency of 10 Hz and 24° C., as calculated by the following equation, that is 0.002 or less: the absolute value of the slope of the change in tan ? with temperature=|[tan ? (?15° C.)?tan ? (24° C.)]/39|.
    Type: Application
    Filed: June 3, 2021
    Publication date: March 24, 2022
    Inventors: Mitsuru Sato, Akira MORITA, Naoya HIGUCHI
  • Patent number: 11263944
    Abstract: A circuit device includes a transfer gate and a control circuit. The transfer gate includes a P-type transistor and an N-type transistor. The control circuit sets, as a first value, a transistor size ratio that is a ratio of a size of the P-type transistor to a size of the N-type transistor when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The control circuit sets the transistor size ratio as a second value greater than the first value when a voltage of the input signal is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: March 1, 2022
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Patent number: 11132933
    Abstract: A circuit device includes a first input terminal, a second input terminal, a reception circuit including a non-inverted input terminal and an inverted input terminal, a first signal line electrically coupling a non-inverted input terminal of the reception circuit and the first input terminal and having a first coupling node and a second coupling node, a second signal line electrically coupling an inverted input terminal of the reception circuit and the second input terminal and having a third coupling node and fourth coupling node, a first variable capacitance circuit having an end coupled to the first coupling node and another end coupled to the second coupling node, and a second variable capacitance circuit having an end coupled to the third coupling node and another end coupled to the fourth coupling node.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: September 28, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Jun Ishida, Akira Morita
  • Patent number: 11094274
    Abstract: A circuit device includes a transfer gate, a charge compensation circuit, and a control circuit. The control circuit controls the charge compensation circuit. The charge compensation circuit discharges charge from an output node of the transfer gate when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The charge compensation circuit injects charge into the output node of the transfer gate when a voltage of the input signal to the transfer gate is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: August 17, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Publication number: 20210225241
    Abstract: A circuit device configured to drive an electro-optical panel including a demultiplexer provided between a first to n-th data lines, n being an integer of three or greater, and a data signal supply line, includes a data line driving circuit configured to output a data signal to the data signal supply line, and a processing circuit configured to set a selection order, by the demultiplexer, of the first to n-th data lines. When an i-th data line, i being an integer of 1 to n, is selected j-th, j being an integer of 1 to n, in the first selection order, the processing circuit sets a second selection order using random number information so as to prohibit the i-th data line from being selected j-th in the second selection order.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 22, 2021
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Fukukai RYU, Akira MORITA
  • Patent number: 11011130
    Abstract: A circuit device includes a driving circuit and an output capacitor. The output capacitor includes a first MIM capacitor element including a first metal layer, a second metal layer, and a first insulating layer, and a second MIM capacitor element including a third metal layer, a fourth metal layer, and a second insulating layer. The first metal layer and the fourth metal layer are electrically coupled to the capacitor drive node, and the second metal layer and the third metal layer are electrically coupled to the voltage output node. The second metal layer is positioned at the third metal layer side with respect to the first metal layer, and the third metal layer is positioned at the second metal layer side with respect to the fourth metal layer.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: May 18, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Patent number: 10957273
    Abstract: A display driver includes a processing circuit configured to output display data, a D/A conversion circuit configured to D/A-convert the display data output from the processing circuit, a data voltage output terminal, and an amplifier circuit configured to output a data voltage to the data voltage output terminal on the basis of a D/A conversion result output from the D/A conversion circuit. In a pre-charge period, the processing circuit outputs first pre-charge data as pre-charge data for a D/A conversion circuit DACi, and outputs second pre-charge data different from the first pre-charge data as pre-charge data for a D/A conversion circuit DACj.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: March 23, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Akihiro Tomie, Akira Morita
  • Publication number: 20210082363
    Abstract: A circuit device includes a transfer gate, a charge compensation circuit, and a control circuit. The control circuit controls the charge compensation circuit. The charge compensation circuit discharges charge from an output node of the transfer gate when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The charge compensation circuit injects charge into the output node of the transfer gate when a voltage of the input signal to the transfer gate is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 18, 2021
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira MORITA
  • Publication number: 20210082332
    Abstract: A circuit device includes a transfer gate and a control circuit. The transfer gate includes a P-type transistor and an N-type transistor. The control circuit sets, as a first value, a transistor size ratio that is a ratio of a size of the P-type transistor to a size of the N-type transistor when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The control circuit sets the transistor size ratio as a second value greater than the first value when a voltage of the input signal is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 18, 2021
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira MORITA
  • Patent number: 10948939
    Abstract: A display driver includes a driving circuit including an amplifier circuit and configured to cause the amplifier circuit to output a data voltage corresponding to display data, a reference voltage generation circuit configured to generate a reference voltage supplied to a reference current source of the amplifier circuit and output the reference voltage to an output node, and a setting circuit configured to set a voltage of the output node of the reference voltage generation circuit. The setting circuit includes a capacitor having one end connected with the output node, and a control circuit configured to control a voltage of another end of the capacitor based on an enable signal to change a voltage of the output node from a first voltage at which a reference current flowing in the reference current source is off, toward the reference voltage.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: March 16, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Patent number: 10937382
    Abstract: A display driver includes a D/A converter circuit for outputting a gradation voltage, and an amplifier circuit that is input with a gradation voltage at an input node. The amplifier circuit includes an operational amplifier, resistance provided between the input node and a node, resistance provided between a node and an output node of the operational amplifier, and an adjustment resistance circuit. The adjustment resistance circuit adjusts a first adjustment resistance value, that is a resistance value between a node and an inverting input node of the operational amplifier, and a second adjustment resistance value, that is a resistance value between the node and the inverting input node.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: March 2, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Publication number: 20210015208
    Abstract: A sole structure includes: a base having a plate-like shape, and disposed near a ground; a plurality of pillars protruding upward from the base, and spaced apart from each other, the pillars being elastically deformable; and an upper plate portion disposed above the base. The pillars are disposed between the base and the upper plate portion with lower end portions of the pillars fixed to the base and with upper end portions of the pillars fixed to the upper plate portion.
    Type: Application
    Filed: January 22, 2019
    Publication date: January 21, 2021
    Inventors: Kentaro Yahata, Keisuke Kushida, Yohei Yoshida, Akira Morita
  • Patent number: 10887134
    Abstract: A circuit device includes a first terminal, a second terminal, a receiving circuit configured to receive the differential signals via the first terminal and the second terminal, a first signal line connecting a first input terminal of the receiving circuit and the first terminal, a second signal line connecting a second input terminal of the receiving circuit and the second terminal, a first capacitor circuit having one end connected to the first signal line, a second capacitor circuit having one end connected to the second signal line, and a detection circuit configured to detect a duty cycle of an output signal that is output from the receiving circuit.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: January 5, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Yoshihito Miyashita, Akira Morita
  • Patent number: 10878767
    Abstract: A display driver includes a D/A converter circuit configured to convert display data into a gradation voltage, an amplifier circuit including an input node to which the gradation voltage is input and configured to output data voltage, and a supply circuit configured to supply an auxiliary current or an auxiliary electrical charge to the input node of the amplifier circuit. In an auxiliary period, an output of the D/A converter circuit is in a high impedance state, and the supply circuit supplies the auxiliary current or the auxiliary electrical charge to the input node of the amplifier circuit. In a non-auxiliary period after the auxiliary period, the D/A converter circuit outputs the gradation voltage to the input node of the amplifier circuit.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: December 29, 2020
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Patent number: 10839767
    Abstract: A display driver includes an operational amplifier, a D/A conversion circuit, a resistance circuit, and a resistance element. The D/A conversion circuit includes first and second variable resistance circuits including one end to which first and second voltages are input and another end connected to an inverting input node. The resistance circuit is provided between the inverting input node and an output node. The resistor is provided between the output node and the inverting input node. A resistance value of the first variable resistance circuit is set based on upper bit data of display data. A resistance value of the second variable resistance circuit is set based on lower bit data of the display data.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: November 17, 2020
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Akira Morita, Takeshi Nomura
  • Publication number: 20200305545
    Abstract: The midsole structure for an athletic shoe includes a midsole body made of foamed resin, and a sheet composite extending at least from the ball of the foot portion to the toe portion in the midsole body and comprising a plurality of foamed rubber sheets that are overlapped and shifted in the longitudinal direction. The sheet composite comprises a single sheet at the toe portion and a plurality of sheets at the ball of the foot portion.
    Type: Application
    Filed: March 17, 2020
    Publication date: October 1, 2020
    Inventors: Kentaro YAHATA, Yohei YOSHIDA, Akira MORITA