Patents by Inventor Akira Morita

Akira Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9697762
    Abstract: In a display device including a driver that drives load lines in an electro-optical panel through capacitor charge redistribution, load capacitance among the load lines of the electro-optical panel differs depending on parasitic capacitance of a board on which the load lines are mounted, the type of the panel, and so on, and the accuracy of driving voltages drops due to such variations. The driver is provided with a adjusting capacitance group that corrects variation in load capacitance, and by adjusting a driving capacitance on the driver side, a ratio with the load capacitance is increased and accuracy of a post-driving potential is increased.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 4, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Patent number: 9679529
    Abstract: In a display device including a driver that drives a load line of an electro-optical panel through capacitor charge redistribution, a data voltage will change in the case where an electro-optical panel-side capacitance changes, even when tone data is the same. Accordingly, by detecting a voltage at a data voltage output terminal, a connection state and outputs between the data voltage output terminal and the electro-optical panel can be detected.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: June 13, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Publication number: 20170057245
    Abstract: An image forming apparatus comprising: a color ink applying unit configured to apply color ink to a print medium; a clear ink applying unit configured to apply a plurality of clear inks to the print medium to cover the applied color ink, each clear ink of the plurality of clear inks having a degree of glossiness that is different from each other; and a determining unit configured to determine an amount ratio of each clear ink to each other clear ink of the plurality of clear inks in accordance with the degree of glossiness indicated by the glossiness data and to determine an amount of each clear ink of the plurality of clear inks such that the determined ratio is satisfied and such that the clear inks cover the applied color ink and print medium at approximately 100% area coverage.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 2, 2017
    Inventors: Akira Morita, Keiichirou Takeuchi, Eisuke Nishitani, Takumi Otani, Fumihiro Goto, Koichiro Nakazawa
  • Publication number: 20170050869
    Abstract: An antimicrobial and algicidal agent for cooling water system contains an antimicrobial agent and an isothiazolone-based compound that effectively kill and remove the algae grown in the cooling water system.
    Type: Application
    Filed: November 8, 2016
    Publication date: February 23, 2017
    Inventor: Akira MORITA
  • Publication number: 20160289102
    Abstract: In a cooling water system having been subjected to an antimicrobial treatment using chlorosulfamic acid or a salt thereof, algae growing therein are effectively killed and removed. An antimicrobial and algicidal method for a cooling water system characterized in that in a cooling water system subjected to an antimicrobial treatment using a chlorosulfamic acid and/or a chlorosulfamic acid salt, when algae are generated, an isothiazolone-based compound is further added to the cooling water system. The chlorosulfamic acid and/or a salt thereof are added to the cooling water system in such a manner as to give a residual chlorine concentration of 0.5 mg-Cl2/L or higher.
    Type: Application
    Filed: September 18, 2014
    Publication date: October 6, 2016
    Inventor: Akira MORITA
  • Publication number: 20160217758
    Abstract: A driver and an electronic device include a driving circuit having a plurality of data line driving circuits that drive a plurality of data lines in an electro-optical panel, and a correction circuit that carries out a correction process on display data and supplies the corrected display data to the driving circuit. The correction circuit supplies, to the data line driving circuits, the display data corrected using a correction coefficient based on coupling capacitances between a given data line and the two data lines adjacent to that data line, respectively.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 28, 2016
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira MORITA
  • Publication number: 20160217759
    Abstract: A driver and an electronic device include a driving circuit having a plurality of data line driving circuits that drive a plurality of data lines in an electro-optical panel, a measurement circuit that measures a voltage in the data lines, and a computation circuit that computes a correction coefficient for correcting display data. Based on a measurement result, the computation circuit computes the correction coefficient that changes in accordance with a coupling capacitance between one data line and a data line adjacent thereto.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 28, 2016
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira MORITA
  • Publication number: 20160163285
    Abstract: A driver and an electronic device include a capacitor driving circuit and a capacitor circuit having a plurality of capacitors provided between a plurality of capacitor driving nodes and a data voltage output terminal. The capacitor driving circuit has a plurality of driving units that output capacitor driving voltages, and in the case where a capacitance of one of the plurality of capacitors is the highest, after a driving unit that drives that capacitor has outputted a capacitor driving voltage, the next driving unit outputs the next capacitor driving voltage.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 9, 2016
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira MORITA
  • Publication number: 20160163284
    Abstract: A driver and an electronic device include a capacitor driving circuit and a capacitor circuit having a plurality of capacitors provided between a plurality of capacitor driving nodes and a data voltage output terminal, and the capacitor driving circuit includes a plurality of driving units that output capacitor driving voltages. In the case where the capacitor that has the highest capacitance among the plurality of capacitors is driven, the driving unit that drives that highest capacitor is a driving unit whose driving capability is variable.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 9, 2016
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira MORITA
  • Publication number: 20160133218
    Abstract: A display device having a driver that drives load lines in an electro-optical panel through capacitor charge redistribution is provided with a first driving capacitance circuit that drives the load lines, and a second driving capacitance circuit that drives output of a D/A conversion circuit for outputting a voltage corresponding to a driving voltage. Settling time of the output of the D/A conversion circuit is shortened by controlling the second driving capacitance circuit to set the output of the D/A conversion circuit to a desired output voltage.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 12, 2016
    Inventor: Akira MORITA
  • Publication number: 20160133219
    Abstract: In a display device having a driver that drives load lines in an electro-optical panel through capacitor charge redistribution, the driver, which drives load lines at a desired voltage through charge redistribution and furthermore drives these load lines at the desired voltage in a voltage driving circuit, includes an auxiliary voltage setting circuit that sets the voltage of an input terminal of the voltage driving circuit to a voltage corresponding to a driving voltage.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 12, 2016
    Inventor: Akira MORITA
  • Publication number: 20160111058
    Abstract: In a display device including a driver that drives a load line of an electro-optical panel through capacitor charge redistribution, a data voltage will change in the case where an electro-optical panel-side capacitance changes, even when tone data is the same. Accordingly, by detecting a voltage at a data voltage output terminal, a connection state and outputs between the data voltage output terminal and the electro-optical panel can be detected.
    Type: Application
    Filed: September 30, 2015
    Publication date: April 21, 2016
    Inventor: Akira MORITA
  • Publication number: 20160111035
    Abstract: In a display device having a driver that drives load lines in an electro-optical panel through capacitor charge redistribution, a data voltage is determined by a capacitance ratio during capacitive driving. However, a panel-side capacitance is a capacitance external to a driver IC, and thus it is difficult to set the capacitance ratio exactly. Accordingly, voltage driving, which outputs a data voltage corresponding to tone data to a data voltage output terminal using a voltage driving circuit, is carried out after capacitive driving that drives the electro-optical panel has been started.
    Type: Application
    Filed: October 6, 2015
    Publication date: April 21, 2016
    Inventor: Akira MORITA
  • Publication number: 20160111038
    Abstract: In a display device including a driver that drives load lines in an electro-optical panel through capacitor charge redistribution, load capacitance among the load lines of the electro-optical panel differs depending on parasitic capacitance of a board on which the load lines are mounted, the type of the panel, and so on, and the accuracy of driving voltages drops due to such variations. The driver is provided with a adjusting capacitance group that corrects variation in load capacitance, and by adjusting a driving capacitance on the driver side, a ratio with the load capacitance is increased and accuracy of a post-driving potential is increased.
    Type: Application
    Filed: September 30, 2015
    Publication date: April 21, 2016
    Inventor: Akira MORITA
  • Patent number: 9313016
    Abstract: A receiver circuit etc. which can receive a high-speed signal is provided without providing a PLL circuit etc. A first receiver circuit for capturing an input signal at a plurality of capture timings determined based on a capture clock signal, includes a delay circuit configured to delay the input signal by a set delay time, and output the delayed input signal, a data latch circuit configured to capture the input signal delayed by the delay circuit at each capture timing, a data test circuit configured to test a latch signal captured by the data latch circuit, and a data test result register configured so that a test result value is set therein. The data test circuit compares the latch signal captured by the latch circuit at each capture timing with an expected value, and outputs the result of the comparison.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: April 12, 2016
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Akira Morita
  • Patent number: 9112503
    Abstract: An electromagnetic coil drive device has a semiconductor switch connected in series with an electromagnetic coil for controlling a current supplied to the coil; a capacitor; a comparator for comparing a voltage to charge and discharge the capacitor with two different voltages, for generating a signal to operate on-off of the semiconductor switch in accordance with a result of a comparison; a first charging circuit to charge the capacitor based on a voltage applied to the coil; and a discharging circuit to discharge the capacitor. The first charging circuit has a first resistor and at least one compensating circuit connected in parallel with the first resistor; and a resistor and a Zener diode are connected in series in the compensating circuit.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: August 18, 2015
    Assignees: FUJI ELECTRIC CO., LTD., FUJI ELECTRIC FA COMPONENTS & SYSTEMS CO., LTD.
    Inventors: Akira Morita, Takahiro Taguchi
  • Patent number: 9067449
    Abstract: Provided is an image recording method, including an intermediate image formation step of forming an intermediate image by applying ink onto a first intermediate transfer member; a first transfer step of transferring, onto a second intermediate transfer member, the intermediate image that is formed on the first intermediate transfer member; and a second transfer step of transferring, onto a recording medium, the intermediate image that is transferred onto the second intermediate transfer member, in which the following relationship is satisfied: Fa<Fb<Fc, where Fa represents an adhesion force between the first intermediate transfer member and the intermediate image, Fb represents an adhesion force between the second intermediate transfer member and the intermediate image, and Fc represents an adhesion force between the recording medium and the intermediate image.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: June 30, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Akira Morita, Sayaka Nomura, Noboru Toyama
  • Publication number: 20150159117
    Abstract: Provided is an edible fat or oil which has excellent oxidative stability and retains the intact flavor inherent in the fat or oil. The edible fat or oil contains a water-soluble antioxidizing substance, which is originally sparingly soluble in fats and oils, in an amount of 5-1,000 weight ppm and has an emulsifier content that is not more than twice the content of the water-soluble antioxidizing substance.
    Type: Application
    Filed: May 14, 2013
    Publication date: June 11, 2015
    Inventors: Hiroshi Kano, Futoshi Yokomizo, Akira Morita
  • Publication number: 20150067359
    Abstract: An information processing apparatus includes a power circuit, a system control circuit, an information processing unit, a device connection port, a first switch, a second switch, and a power control circuit to supply the electric power to the device connection port from the power circuit with the system control circuit booting up the information processing unit when accepting the instruction of the power supply by the first switch, and to supply the electric power to the device connection port from the power circuit with the system control circuit restraining the information processing unit from being booted up when accepting the instruction of the power supply by the second switch in a state of the first switch not accepting the instruction of the power supply.
    Type: Application
    Filed: August 5, 2014
    Publication date: March 5, 2015
    Inventor: Akira MORITA
  • Publication number: 20150049848
    Abstract: A receiver circuit etc. which can receive a high-speed signal is provided without providing a PLL circuit etc. A first receiver circuit for capturing an input signal at a plurality of capture timings determined based on a capture clock signal, includes a delay circuit configured to delay the input signal by a set delay time, and output the delayed input signal, a data latch circuit configured to capture the input signal delayed by the delay circuit at each capture timing, a data test circuit configured to test a latch signal captured by the data latch circuit, and a data test result register configured so that a test result value is set therein. The data test circuit compares the latch signal captured by the latch circuit at each capture timing with an expected value, and outputs the result of the comparison.
    Type: Application
    Filed: February 8, 2013
    Publication date: February 19, 2015
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Akira Morita