Patents by Inventor Akira Nishiyama

Akira Nishiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060000573
    Abstract: Lubricant oil feeding means 2 of a die casting machine 1 comprises a lubricant oil feed passage 19 for feeding a lubricant oil into a clearance between the inner peripheral surface of a sleeve 7 and the outer peripheral surface of an injection piston 9, a lubricant oil feed valve 20 for opening or closing the lubricant oil feed passage, an air feed passage 16 for feeding air into a clearance between the inner peripheral surface of the sleeve and the outer peripheral surface of the injection piston, and an air feed valve 18 for opening and closing the air feed passage, and an arrangement is such that the lubricant oil feed valve is initially opened to feed the lubricant oil into the clearance between the sleeve and the injection piston and the air feed valve is then opened to pump the lubricant oil by the air. It is possible to spread the lubricant oil extensively and quickly, and accordingly, the useful life of the sleeve and the injection piston can be improved with a reduced quantity of lubricant oil.
    Type: Application
    Filed: June 24, 2005
    Publication date: January 5, 2006
    Inventors: Yoshiyuki Shinki, Isamu Izutsu, Akira Nishiyama, Kazuko Nishiyama
  • Patent number: 6982467
    Abstract: A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: January 3, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masato Koyama, Akira Nishiyama, Masamichi Suzuki, Yuuichi Kamimuta, Tsunehiro Ino
  • Publication number: 20050277791
    Abstract: A process for easily producing an optically active ?-amino alcohol useful as a pharmaceutical intermediate from an inexpensive, readily available starting material is provided. A readily available ?-substituted ketone is reacted with an optically active amine to yield a diastereomer mixture of an optically active ?-substituted aminoketone. One of the diastereomers is isolated optionally after the diastereomers are converted to salts with an acid. The optically active ?-substituted aminoketone or a salt thereof thus isolated was stereoselectively reduced to yield an optically active ?-substituted amino alcohol. The optically active ?-substituted amino alcohol is subjected to hydrogenolysis to produce an optically active ?-amino alcohol or a salt thereof.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 15, 2005
    Applicant: KANEKA CORPORATION
    Inventors: Akira Nishiyama, Narumi Kishimoto, Nobuo Nagashima
  • Publication number: 20050184346
    Abstract: A semiconductor device includes a silicon substrate, a channel region formed in a surface of the silicon substrate, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film, first gate side walls formed on the gate insulating film to sandwich the gate electrode in a gate length direction, second gate side walls which sandwich the gate electrode and the first gate side wall, first diffused layers formed on the surface of the silicon substrate to sandwich the channel region, second diffused layers which sandwich the channel region and the first diffused layer and have a larger depth than that of the first diffused layer, and low resistance layers which are formed between the first diffused layer and the second gate side wall and contain nitride, boride or carbide of Ti, Zr, Hf or Ta.
    Type: Application
    Filed: February 8, 2005
    Publication date: August 25, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masato Koyama, Akira Nishiyama, Yuuichi Kamimuta
  • Publication number: 20050179091
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. A semiconductor device of one of several disclosed embodiments comprises a semiconductor layer having a source region and a drain region, and a gate insulating film provided on the semiconductor layer between the source region and the drain region. The gate insulating film comprising an oxide including a metal element and further includes at least one element selected from the group consisting of nitrogen and aluminum as a first element. The content of the first element is relatively higher at both ends near the source region and the drain region than at a center of the gate insulating film. A gate electrode is provided on the gate insulating film.
    Type: Application
    Filed: April 13, 2005
    Publication date: August 18, 2005
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira Nishiyama, Seiji Inumiya
  • Patent number: 6924536
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. A semiconductor device of one of several disclosed embodiments comprises a semiconductor layer having a source region and a drain region, and a gate insulating film provided on the semiconductor layer between the source region and the drain region. The gate insulating film comprising an oxide including a metal element and further includes at least one element selected from the group consisting of nitrogen and aluminum as a first element. The content of the first element is relatively higher at both ends near the source region and the drain region than at a center of the gate insulating film. A gate electrode is provided on the gate insulating film.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Nishiyama, Seiji Inumiya
  • Publication number: 20050142769
    Abstract: Disclosed is a semiconductor device comprising a Ge semiconductor area, and an insulating film area, formed in direct contact with the Ge semiconductor area, containing metal, germanium, and oxygen.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 30, 2005
    Inventors: Yoshiki Kamata, Akira Nishiyama, Tsunehiro Ino, Yuuichi Kamimuta, Masahiro Koike
  • Patent number: 6903225
    Abstract: This invention provides a process for producing optically active 2-[6-(hydroxymethyl)-1,3-dioxan-4-yl]acetic acid derivatives, which are of value as intermediates of drugs, from inexpensive starting materials without using any special equipment such as that required for super-low temperature reactions. A process for producing optically active 2-[6-(hydroxymethyl)-1,3-dioxan-4-yl]acetic acid derivatives which comprises reacting an acetic acid derivative at a temperature of not less than ?30° C.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: June 7, 2005
    Assignee: Kaneka Corporation
    Inventors: Noriyuki Kizaki, Yukio Yamada, Yoshihiko Yasohara, Akira Nishiyama, Makoto Miyazaki, Masaru Mitsuda, Takeshi Kondo, Noboru Ueyama, Kenji Inoue
  • Publication number: 20050080277
    Abstract: The present invention is to provide a production technology by which an optically active 2-[6-(hydroxymethyl)-1,3-dioxan-4-yl]acetic acid derivative, which are of value as pharmaceutical intermediates, can be produced from inexpensive and readily available starting materials without using any extraordinary equipment such as an ultra-low-temperature reactor. The present invention is a production process of an optically active 2-[6-(hydroxymethyl)-1,3-dioxan-4-yl]acetic acid derivative which comprises reacting an enolate, prepared by permitting a base or a 0-valent metal to act on an acetic acid ester derivative with (S)-?-hydroxy-?-butyrolactone at a temperature not lower than ?30° C.
    Type: Application
    Filed: June 5, 2001
    Publication date: April 14, 2005
    Inventors: Akira Nishiyama, Miho Horikawa, Yoshihiko Yasohara, Noboru Ueyama, Kenji Inoue
  • Publication number: 20050040461
    Abstract: A semiconductor device comprises a semiconductor substrate, a first circuit formed on the substrate, and a second circuit connected to the first circuit as an input/output portion thereof and powered by a voltage higher than that for the first circuit, the first circuit including a first and a second field-effect transistor, the first drain region of the first transistor accompanying a first load capacitance, the second drain region of the second transistor accompanying a second load capacitance smaller than the first load capacitance, and the first gate insulation film of the first transistor having an average relative dielectric constant higher than that of the second gate insulation film of the second transistor, thereby realizing a high operation speed.
    Type: Application
    Filed: September 29, 2004
    Publication date: February 24, 2005
    Inventors: Mizuki Ono, Akira Nishiyama
  • Patent number: 6849908
    Abstract: A good interface characteristic can be maintained, and a leakage current of a dielectric film can be decreased. A semiconductor device according to one aspect of the present invention includes: a semiconductor substrate; a gate dielectric film containing at least nitrogen and a metal, the gate dielectric film being formed on the semiconductor substrate, and including a first layer region contacting the semiconductor substrate, a second layer region located at a side opposite to that of the first layer region in the gate dielectric film, and a third layer region located between the first and second layer regions, a maximum value of a nitrogen concentration in the third layer region being higher than maximum values thereof in the first and second layer regions; a gate electrode contacting the second layer region; and a pair of source and drain regions formed at both sides of the gate dielectric film in the semiconductor substrate.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: February 1, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Izumi Hirano, Masato Koyama, Akira Nishiyama
  • Publication number: 20050017305
    Abstract: A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.
    Type: Application
    Filed: June 9, 2004
    Publication date: January 27, 2005
    Inventors: Masato Koyama, Akira Nishiyama, Masamichi Suzuki, Yuuichi Kamimuta, Tsunehiro Ino
  • Patent number: 6847084
    Abstract: A semiconductor device comprises a semiconductor substrate, a first circuit formed on the substrate, and a second circuit connected to the first circuit as an input/output portion thereof and powered by a voltage higher than that for the first circuit, the first circuit including a first and a second field-effect transistor, the first drain region of the first transistor accompanying a first load capacitance, the second drain region of the second transistor accompanying a second load capacitance smaller than the first load capacitance, and the first gate insulation film of the first transistor having an average relative dielectric constant higher than that of the second gate insulation film of the second transistor, thereby realizing a high operation speed.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: January 25, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mizuki Ono, Akira Nishiyama
  • Publication number: 20040207023
    Abstract: A complementary field effect transistor comprises: a semiconductor substrate; an n-type field effect transistor provided on the semiconductor substrate; and a p-type field effect transistor provided on the semiconductor substrate. The n-type field effect transistor has: a first gate insulating film containing an oxide including an element selected from the group consisting of group IV metals and Lanthanoid metals, and further containing a compound of the element and a group III element; a first gate electrode provided on the first gate insulating film; and n-type source and drain regions formed on both sides of the first gate electrode.
    Type: Application
    Filed: January 21, 2004
    Publication date: October 21, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Nishiyama, Mizuki Ono, Masato Koyama, Takamitsu Ishihara
  • Patent number: 6803635
    Abstract: There is disclosed a MIS field effect transistor, comprising a silicon substrate, an insulating film formed over the silicon substrate and containing silicon and at least one of nitrogen and oxygen, a metal oxynitride film formed on the insulating film and containing at least one kind of metal atom selected from the group consisting of zirconium, hafnium and a lanthanoide series metal, the metal oxynitride film containing nitrogen atom not bonding with the metal atom without metal-nitrogen bond at the density of higher than 1019/cm3, and a gate electrode formed on the metal oxynitride film.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: October 12, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masato Koyama, Akira Nishiyama
  • Publication number: 20040199005
    Abstract: The present invention provides a method for easily producing an (R)-3-[4-(trifluoromethyl)phenylamino]-pentanoic acid amide derivative useful for an intermediate for pharmaceutical products, particularly an inhibitor of a cholesteryl ester transfer protein (CETP) from easily available raw materials.
    Type: Application
    Filed: March 16, 2004
    Publication date: October 7, 2004
    Applicant: KANEKA CORPORATION
    Inventors: Tatsuyoshi Tanaka, Masanobu Sugawara, Hirofumi Maeda, Akira Nishiyama, Yoshihiko Yoshohara, Nobuo Nagashima
  • Publication number: 20040178480
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed on the surface of the substrate, and an electrode formed on the insulating film. The substrate side of the insulating film is formed of an epitaxial crystalline insulating layer containing metal, silicon and oxygen, and the electrode side of the insulating film is formed of an amorphous insulating layer additionally containing nitrogen.
    Type: Application
    Filed: December 4, 2003
    Publication date: September 16, 2004
    Inventors: Masato Koyama, Akira Nishiyama
  • Publication number: 20040169240
    Abstract: A semiconductor device comprises a substrate and a MISFET including source-drain regions formed in the substrate and a gate electrode formed on the substrate with a gate insulating film interposed therebetween. The gate electrode is formed of a metal oxynitride film containing a metal-oxygen-nitrogen bond chain. Alternatively, the gate insulating film is formed of a nitrided metal silicate film containing at least one of a metal-oxygen-nitrogen bond chain and asilicon-oxygen-nitrogen bond chain.
    Type: Application
    Filed: December 4, 2003
    Publication date: September 2, 2004
    Inventors: Masato Koyama, Akira Nishiyama, Yasushi Nakasaki, Masamichi Suzuki, Yuuichi Kamimuta, Akio Kaneko
  • Publication number: 20040164329
    Abstract: A good interface characteristic can be maintained, and a leakage current of a dielectric film can be decreased. A semiconductor device according to one aspect of the present invention includes: a semiconductor substrate; a gate dielectric film containing at least nitrogen and a metal, the gate dielectric film being formed on the semiconductor substrate, and including a first layer region contacting the semiconductor substrate, a second layer region located at a side opposite to that of the first layer region in the gate dielectric film, and a third layer region located between the first and second layer regions, a maximum value of a nitrogen concentration in the third layer region being higher than maximum values thereof in the first and second layer regions; a gate electrode contacting the second layer region; and a pair of source and drain regions formed at both sides of the gate dielectric film in the semiconductor substrate.
    Type: Application
    Filed: February 6, 2004
    Publication date: August 26, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Izumi Hirano, Masato Koyama, Akira Nishiyama
  • Publication number: 20040155353
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Application
    Filed: February 6, 2004
    Publication date: August 12, 2004
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama