Patents by Inventor Akira Ogawa

Akira Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130279253
    Abstract: A semiconductor chip D1 of a flash memory which is stacked together with other semiconductor chips D2˜DN to form a multi-chip package (MCP), including a memory cell array 20 of the flash memory for storing an ID code and an upper address, wherein the ID code is written into the a fuse data region 20F of the memory cell array 20 before the assembly process. According to the invention, ID codes and upper addresses can be assigned and written to each of the semiconductor chips of a multi-chip package easily without increasing the size of the semiconductor chips in comparison with the prior art.
    Type: Application
    Filed: September 14, 2012
    Publication date: October 24, 2013
    Inventors: Akira OGAWA, Yoshichika NAKAYA
  • Publication number: 20130249595
    Abstract: A level shift circuit, for outputting a data output signal with a second level via an output inverter after a data input signal with a first level is stored in a latch, includes a level set circuit, when the output data signal outputs with a low level, setting the output data signal to a low level in response to a change of the input data signal. The level set circuit is connected to an output terminal of the output inverter, and has an NMOS transistor having a drain electrode and a source electrode coupled to a ground, wherein the NMOS transistor turns on in response to the input data signal with a high level.
    Type: Application
    Filed: July 13, 2012
    Publication date: September 26, 2013
    Applicant: POWERCHIP TECHNOLOGY CORPORATION
    Inventor: Akira OGAWA
  • Publication number: 20130188794
    Abstract: Provided is a device for detecting sound outside vehicle capable of detecting sounds outside the vehicle with high accuracy in various surrounding environments. A sound source direction detecting ECU 1 acquires sound collection information about sounds outside a vehicle which are collected by microphones 2A to 2G. The sound source direction detecting ECU 1 acquires traveling road information about the vicinity of a host vehicle on the basis of the acquired sound collection information. When the traveling road information is acquired, the sound source direction detecting ECU 1 adjusts the sound collection characteristics of the microphones 2A to 2G on the basis of the traveling road information.
    Type: Application
    Filed: April 26, 2011
    Publication date: July 25, 2013
    Applicants: MEIJO UNIVERSITY, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shinya Kawamata, Hisashi Satonaka, Ryuji Funayama, Keiichi Yamada, Osami Yamamoto, Hideki Banno, Kensaku Asahi, Akira Ogawa
  • Publication number: 20130155774
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Application
    Filed: September 11, 2012
    Publication date: June 20, 2013
    Inventors: Akira OGAWA, Masaru YANO
  • Publication number: 20130130317
    Abstract: The present invention provides a medium suitable for animal cell culture, a culture method using the same, and the like. The present invention relates to a method for culturing animal cells having an ability to produce a substance, which comprises culturing the animal cells in a medium supplemented with an oligopeptide having one or more L-cysteines and excluding glutathione, a method for producing a substance by culturing animal cells having the ability to produce the substance, which comprises culturing the animal cells in a medium supplemented with an oligopeptide having one or more L-cysteines and excluding glutathione to produce and accumulate the substance in the culture, and collecting the substance from the culture, and a culture medium comprising an oligopeptide having one or more L-cysteines and excluding glutathione.
    Type: Application
    Filed: July 28, 2011
    Publication date: May 23, 2013
    Applicant: KYOWA HAKKO KIRIN CO., LTD
    Inventors: Akira Ogawa, Wataru Kurihashi, Yoshinobu Konno
  • Publication number: 20130064016
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Application
    Filed: March 6, 2012
    Publication date: March 14, 2013
    Inventors: Akira OGAWA, Masaru YANO
  • Patent number: 8351268
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: January 8, 2013
    Assignee: Spansion LLC
    Inventors: Akira Ogawa, Masaru Yano
  • Patent number: 8264901
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: September 11, 2012
    Assignee: Spansion LLC
    Inventors: Akira Ogawa, Masaru Yano
  • Publication number: 20120197172
    Abstract: A device includes: a cylindrical body formed of an elastic material; and a slit formed along a longitudinal direction of the cylindrical body from one end to an opposite end of the cylindrical body, a distal end of a nail being inserted to be held in the slit. The cylindrical body includes: plural pairs of holding teeth plurally divided in the longitudinal direction of the cylindrical body by dividing grooves formed from the slit along a circumferential direction of the cylindrical body such that the holding teeth of each pair are opposed to each other across the slit to hold the distal end of the nail; and coupling pieces configured to couple adjacent ones of the holding teeth on an opposite side of the slit.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 2, 2012
    Applicant: ACTMENT CO., LTD
    Inventor: Akira OGAWA
  • Publication number: 20120121366
    Abstract: A spare wheel holding apparatus includes a device for winding up a spare wheel with a suspending member. The device includes a rotation restricting plate and a rotation restricting pin having a projecting pin portion. When a winding-off force is applied to the suspending member, the rotation restricting plate abuts on the projecting pin portion, thereby stopping winding-off of the suspending member. A suspending member breakage preventing mechanism also uses the rotation restricting pin as a safety pin. If the winding-off force is larger than that in normal, the projecting pin portion is broken at a root portion, the suspending member is wound off, thereby preventing breakage. The root portion has a smaller thickness than a tip end portion of the projecting pin portion.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 17, 2012
    Applicant: SANKOKIKI KABUSHIKI KAISHA
    Inventor: Akira OGAWA
  • Publication number: 20120069676
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Application
    Filed: October 5, 2011
    Publication date: March 22, 2012
    Inventors: Akira OGAWA, Masaru YANO
  • Patent number: 8137297
    Abstract: An elastic metal strip aligning a longitudinal direction with a rolling direction of a cold-rolled plate is collected and processed to a shape including a correction plate with the longitudinal direction of the elastic metal as a width direction of a nail and a plurality of tongue strips protruded from the edge of the correction plate near the nail tip. Each tongue strip is folded and bent to form a hooked claw with a double structure of a folding part and a bending part. A nail tip of a deformed nail is inserted between the hooked claw and the correction plate to apply a restoring force of elasticity in the correction plate to the deformed nail as correction ability for deformed nails. A wrought wire rod can be used instead of a cold-rolled plate and a Cu—Al—Mn type shape-memory alloy may further be used as a raw material.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: March 20, 2012
    Assignee: Tohoku University
    Inventors: Kiyohito Ishida, Kiyoshi Yamauchi, Ryosuke Kainuma, Yuji Sutou, Toshihiro Omori, Akira Ogawa
  • Patent number: 8130584
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: March 6, 2012
    Assignee: Spansion LLC
    Inventors: Akira Ogawa, Masaru Yano
  • Publication number: 20120028192
    Abstract: According to one embodiment, a control method for an exposure apparatus is disclosed. The method can include retrieving, from a database, a correction amount of alignment correction at a time of exposure of a wafer and an inclination amount of a wafer stage with respect to an optical axis of an exposure optical system at the time of exposure. The method can include making a determination on the inclination amount based on a predetermined condition. The method can include making a determination on the correction amount based on the predetermined condition. In addition, the method can include issuing an alarm when the inclination amount and the correction amount both satisfy the condition.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 2, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenichi TSUJISAWA, Hiroshi Matsushita, Takayoshi Otake, Hideyuki Oishi, Akira Ogawa, Koji Washiyama
  • Publication number: 20110302058
    Abstract: Provided is a content playback apparatus capable of presenting, while playback a digital content, selling price information for the digital content being reproduced. The content playback apparatus is provided with a content playback portion which reproduces a digital content, a selling price information obtaining portion which obtains selling price information concerning the digital content, and a selling price information presentation portion which presents the obtained selling price information. The selling price information presentation portion presents, during playback of a digital content, the selling price information concerning the digital content.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 8, 2011
    Inventors: Masaki HASHIURA, Gen AOYAMA, Yoshinari SAWATA, Akira OGAWA
  • Patent number: 8064264
    Abstract: A semiconductor device that includes: a memory cell array that includes non-volatile memory cells; an area that is contained in the memory cell array and stores area data; a first storage unit that holds data transferred from the memory cell array, and outputs the data; and a control circuit that selects between a primary reading mode for causing the first storage unit to hold the area data transferred from the memory cell array and to output the area data, and a secondary reading mode for causing the first storage unit to hold a plurality of pieces of divisional data formed by dividing the area data and transferred from the memory cell array and to output the divisional data.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: November 22, 2011
    Assignee: Spansion LLC
    Inventors: Naoharu Shinozaki, Masao Taguchi, Akira Ogawa, Takuo Ito
  • Patent number: 8045388
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: October 25, 2011
    Assignee: Spansion LLC
    Inventors: Akira Ogawa, Masaru Yano
  • Patent number: 8020649
    Abstract: A legged robot that ensures a large step length while keeping the height of the trunk low is realized. The legged robot is provided with a trunk, a pair of legs, and a pair of sliding joints. Each of the sliding joints links one end of each of the legs to the trunk so as to slide in a front and rear direction with respect to the trunk. For each step, one leg is caused to slide forward, and the other leg is caused to slide backward. It is possible to ensure a predetermined distance between the end portion of the one leg and the end portion of the other leg. The legged robot can make the step length large by an amount that is equivalent to this distance irrespective of the length of the legs.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: September 20, 2011
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Akira Ogawa
  • Publication number: 20110182116
    Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Application
    Filed: October 11, 2010
    Publication date: July 28, 2011
    Inventors: Akira OGAWA, Masaru YANO
  • Patent number: 7978523
    Abstract: The present invention provides a semiconductor memory and a control method therefore, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: July 12, 2011
    Assignee: Spansion LLC
    Inventors: Akira Ogawa, Masaru Yano