Patents by Inventor Akira Takenouchi
Akira Takenouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240119296Abstract: A learning device calculates an estimation target item reference value according to a fixed value of each estimation target object. The learning device acquires learning data that includes the fixed value of each estimation target object, a variable item value, and an estimation target item value according to the fixed value and the variable item value. The learning device trains, using the learning data and an evaluation function, a model that outputs an estimated value of the estimation target item value in response to input of the fixed value of each estimation target object and the variable item value.Type: ApplicationFiled: June 7, 2021Publication date: April 11, 2024Applicant: NEC CorporationInventors: Akira TANIMOTO, Tomoya SAKAI, Takashi TAKENOUCHI, Hisashi KASHIMA
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Patent number: 7097712Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.Type: GrantFiled: August 2, 1996Date of Patent: August 29, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 6897100Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.Type: GrantFiled: February 12, 1997Date of Patent: May 24, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroyuki Shimada, Akira Takenouchi, Yasuhiko Takemura
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Publication number: 20040211356Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.Type: ApplicationFiled: February 12, 1997Publication date: October 28, 2004Inventors: SHUNPEI YAMAZAKI, HIROYUKI SHIMADA, AKIRA TAKENOUCHI, YASUHIKO TAKEMURA
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Patent number: 6599359Abstract: A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.Type: GrantFiled: December 12, 2000Date of Patent: July 29, 2003Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 6465284Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a semiconductor film on a substrate, oxidizing a surface of said semiconductor film in an oxidizing atmosphere with said semiconductor film heated or irradiated with light, and further depositing an oxide film on the oxidized surface of the semiconductor film by PVD or CVD. The first oxide film has a good interface condition with the semiconductor film and a characteristics of an insulated gate field effect transistor can be improved if the first oxide film and the second oxide film are used as a gate insulating film.Type: GrantFiled: February 9, 2001Date of Patent: October 15, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Takeshi Fukada, Hiroshi Uehara, Yasuhiko Takemura
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Patent number: 6433361Abstract: In forming a thin film transistor (TFT), a semiconductor region is formed on a glass substrate and then a gate electrode is formed on the semiconductor region through an gate insulating film. After the gate electrode and a gate electrode arrangement extended from the gate electrode is anodized, insulators each having approximately rectangular shape are formed on side surfaces of the gate electrode and the gate electrode arrangement. An interlayer insulator is formed on a whole surface, and then the second layer arrangement is formed on the interlayer insulator. In an overlap portion in which the second layer arrangement overlaps the gate electrode and the gate electrode arrangement, since the insulators is formed, a slope is small.Type: GrantFiled: February 5, 1997Date of Patent: August 13, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Akira Takenouchi, Hideomi Suzawa
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Patent number: 6388291Abstract: In forming a thin film transistor (TFT), a semiconductor region is formed on a glass substrate and then a gate electrode is formed on the semiconductor region through an gate insulating film. After the gate electrode and a gate electrode arrangement extended from the gate electrode is anodized, insulators each having approximately rectangular shape are formed on side surfaces of the gate electrode and the gate electrode arrangement. An interlayer insulator is formed on a whole surface, and then the second layer arrangement is formed on the interlayer insulator. In an overlap portion in which the second layer arrangement overlaps the gate electrode and the gate electrode arrangement, since the insulators is formed, a slope is small.Type: GrantFiled: January 18, 2000Date of Patent: May 14, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Akira Takenouchi, Hideomi Suzawa
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Publication number: 20020017233Abstract: A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.Type: ApplicationFiled: December 12, 2000Publication date: February 14, 2002Inventors: Hiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 6329229Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one these vacuum apparatuses is a laser.Type: GrantFiled: November 3, 1997Date of Patent: December 11, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroyuki Shimada, Akira Takenouchi, Yasuhiko Takemura
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Publication number: 20010019860Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a semiconductor film on a substrate, oxidizing a surface of said semiconductor film in an oxidizing atmosphere with said semiconductor film heated or irradiated with light, and further depositing an oxide f ilm on the oxidized surface of the semiconductor film by PVD or CVD. The first oxide film has a good interface condition with the semiconductor film and a characteristics of an insulated gate field effect transistor can be improved if the first oxide film and the second oxide film are used as a gate insulating film.Type: ApplicationFiled: February 9, 2001Publication date: September 6, 2001Inventors: Hirocki Adachi, Akira Takenouchi, Takeshi Fukada, Hiroshi Uehara, Yasuhiko Takemura
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Patent number: 6210997Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a semiconductor film on a substrate, oxidizing a surface of said semiconductor film in an oxidizing atmosphere with said semiconductor film heated or irradiated with light, and further depositing an oxide film on the oxidized surface of the semiconductor film by PVD or CVD. The first oxide film has a good interface condition with the semiconductor film and a characteristics of an insulated gate field effect transistor can be improved if the first oxide-film and the second oxide film are used as a gate insulating film.Type: GrantFiled: July 28, 1999Date of Patent: April 3, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Takeshi Fukada, Hiroshi Uehara, Yasuhiko Takemura
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Patent number: 6171890Abstract: A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.Type: GrantFiled: October 20, 1999Date of Patent: January 9, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 6172671Abstract: There is provided an active matrix type display in which thin film transistors having required characteristics are provided selectively in a pixel matrix portion and a peripheral driving circuit portion. In a structure having the pixel matrix portion and the peripheral driving circuit portion on the same substrate, N-channel type thin film transistors having source and drain regions formed through a non-self-alignment process and low concentrate impurity regions formed through a self-alignment process are formed in the pixel matrix portion and in an N-channel driver portion of the peripheral driving circuit portion. A P-channel type thin film transistor in which no low concentrate impurity region is formed and source and drain regions are formed only through the self-alignment process is formed in a P-channel driver portion of the peripheral driving circuit portion.Type: GrantFiled: June 3, 1999Date of Patent: January 9, 2001Assignee: Semiconductor Energy Laboratory, Inc.Inventors: Tsukasa Shibuya, Atsushi Yoshinouchi, Hongyong Zhang, Akira Takenouchi
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Patent number: 6159777Abstract: An improved method of forming a semiconductor device on a glass substrate is described. The method comprises forming a semiconductor film on a glass substrate, heating the semiconductor film by means of a heater to a predetermined temperature, exposing the semiconductor film to pulsed laser light after the semiconductor film has been heated to the predetermined temperature by the heating step. The thermal shock due to sharp temperature change is lessened by the pre-heating step.Type: GrantFiled: October 28, 1997Date of Patent: December 12, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akira Takenouchi, Atsunori Suzuki, Hideto Ohnuma, Hongyong Zhang, Shunpei Yamazaki
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Patent number: 5985704Abstract: A method for forming a silicon island used for forming a TFT or thin film diode comprises the step of pattering a silicon film with a photoresist mask. In order to prevent the contamination of the semiconductor film due to the photoresist material, a protective film such as silicon oxide is interposed between the semiconductor film and the photoresist film. Also, the protective film is preferably formed by thermal annealing or light annealing in an oxidizing atmosphere.Type: GrantFiled: December 7, 1995Date of Patent: November 16, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Yasuhiko Takemura
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Patent number: 5966193Abstract: This invention is characterized by providing light shield patterning on a TFT substrate for an active matrix type liquid crystal display device. A liquid crystal display device comprising an active matrix circuit using a TFT having a top gate-type structure. The light-shield film are formed under a semiconductor layer and superposed at least one of the source bus line and the gate bus line. A capacitance is formed by the light-shield film and at least a part of the semiconductor layer with an insulating layer interposed therebetween.Type: GrantFiled: July 11, 1997Date of Patent: October 12, 1999Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Hongyong Zhang, Akira Takenouchi, Tadayoshi Miyamoto, Atsushi Yoshinouchi
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Patent number: 5966594Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a semiconductor film on a substrate, oxidizing a surface of said semiconductor film in an oxidizing atmosphere with said semiconductor film heated or irradiated with light, and further depositing an oxide film on the oxidized surface of the semiconductor film by PVD or CVD. The first oxide film has a good interface condition with the semiconductor film and a characteristics of an insulated gate field effect transistor can be improved if the first oxide film and the second oxide film are used as a gate insulating film.Type: GrantFiled: December 18, 1996Date of Patent: October 12, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroki Adachi, Akira Takenouchi, Takeshi Fukada, Hiroshi Uehara, Yasuhiko Takemura
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Patent number: D528881Type: GrantFiled: August 3, 2004Date of Patent: September 26, 2006Assignee: Maeda Metal Industries, Ltd.Inventor: Akira Takenouchi
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Patent number: D972903Type: GrantFiled: March 1, 2021Date of Patent: December 20, 2022Assignee: TONE CO., LTD.Inventors: Motohiro Hirao, Akira Takenouchi