Patents by Inventor Akira Tanimoto
Akira Tanimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230214722Abstract: A forecast support device acquires learning data including: a forecast value; and an actual value when the forecast value is disclosed. The forecast support device trains a model indicating a relationship between: the forecast value; and the actual value when the forecast value is disclosed, by using the learning data.Type: ApplicationFiled: December 23, 2022Publication date: July 6, 2023Applicants: NEC CORPORATION, KYOTO UNIVERSITYInventors: Akira TANIMOTO, Koh TAKEUCHI
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Patent number: 11475377Abstract: A maintenance range optimization apparatus 10 optimizes a range of maintenance on an object that requires maintenance at a plurality of places. The maintenance range optimization apparatus 10 includes a learning processing unit 20 that executes machine learning, using, as learning data, information from when maintenance was previously executed, including a pre-maintenance state, a maintenance cost and a movement cost of a place subjected to maintenance, and constructs a model indicating a relationship between the range of maintenance and an overall cost incurred in maintenance, and a maintenance range setting unit 30 that sets the range of maintenance using the model.Type: GrantFiled: September 7, 2018Date of Patent: October 18, 2022Assignee: NEC CORPORATIONInventor: Akira Tanimoto
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Publication number: 20210158380Abstract: A predicting data generation unit 91 generates, on the basis of a prediction day, predicting data having added thereto a value of an explanatory variable indicating whether the day corresponds to a date predetermined as a day on which cash transfer will take place. A prediction device 92 predicts cash demand by applying the predicting data to a learned model, the learned model having prediction formulae determined depending on a value of an explanatory variable. The prediction device 92, in accordance with the value of the explanatory variable included in the predicting data, selects a prediction formula for use in the prediction from among the plurality of prediction formulae indicated by the learned model, and applies the predicting data to the selected prediction formula to predict the cash demand.Type: ApplicationFiled: June 27, 2018Publication date: May 27, 2021Applicant: NEC CORPORATIONInventors: Takashi TOUKAIRIN, Yousuke MOTOHASHI, Keiji KANDA, Akira TANIMOTO
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Patent number: 11004007Abstract: A predictor management system includes a storage unit 81 and update history management means 82. The storage unit 81 stores, in association with each of a plurality of prediction targets, an update history of a predictor corresponding to the prediction target. The update history management means 82 stores, in response to updating of a predictor, a prediction target of the predictor and an update time of the predictor in the storage unit 81 in association with each other.Type: GrantFiled: March 23, 2015Date of Patent: May 11, 2021Assignee: NEC CORPORATIONInventors: Akira Tanimoto, Yousuke Motohashi, Hiroki Nakatani
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Publication number: 20200302347Abstract: A maintenance range optimization apparatus 10 optimizes a range of maintenance on an object that requires maintenance at a plurality of places. The maintenance range optimization apparatus 10 includes a learning processing unit 20 that executes machine learning, using, as learning data, information from when maintenance was previously executed, including a pre-maintenance state, a maintenance cost and a movement cost of a place subjected to maintenance, and constructs a model indicating a relationship between the range of maintenance and an overall cost incurred in maintenance, and a maintenance range setting unit 30 that sets the range of maintenance using the model.Type: ApplicationFiled: September 7, 2018Publication date: September 24, 2020Applicant: NEC CORPORATIONInventor: Akira TANIMOTO
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Publication number: 20200272906Abstract: A discriminant model generation device 80 includes a calculation unit 81 and a learning unit 82. The calculation unit 81 calculates a label to be added to learning data, in accordance with a difference between a threshold value for discriminating a positive example or a negative example and a value of an objective variable included in the learning data. The learning unit 82 learns a discriminant model by using learning data associated with a calculated label.Type: ApplicationFiled: July 24, 2018Publication date: August 27, 2020Applicant: NEC CorporationInventor: Akira TANIMOTO
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Patent number: 10635078Abstract: Reception means 81 receives an estimator learned using measured data up to a point of time in the past, verification data that is measured data from the point of time onward, and an update rule prescribing whether or not the estimator needs to be updated based on an evaluation index. Simulation means 82 simulates at least one of the evaluation index of the estimator and an update result of the estimator in a predetermined period, based on the update rule and an estimation result calculated by applying the verification data of the predetermined period to the estimator in chronological order.Type: GrantFiled: March 23, 2015Date of Patent: April 28, 2020Assignees: NEC CORPORATION, NEC Solution Innovators, Ltd.Inventors: Akira Tanimoto, Yousuke Motohashi, Mamoru Iguchi
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Patent number: 10504254Abstract: A storage unit 81 stores information associating each of a plurality of prediction targets with a predictor-related index related to a predictor for predicting the prediction target. Scatter graph generation means 82 generates, based on the information stored in the storage unit 81, a scatter graph in which a symbol representing the prediction target of the predictor is located at a position determined by the predictor-related index in a coordinate space where the predictor-related index is defined as at least one dimension.Type: GrantFiled: March 23, 2015Date of Patent: December 10, 2019Assignee: NEC CORPORATIONInventors: Akira Tanimoto, Yousuke Motohashi, Hiroki Nakatani, Hiroshi Kitajima
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Publication number: 20190279037Abstract: A multi-task relationship learning system 80 for simultaneously estimating a plurality of prediction models includes a learner 81 for optimizing the prediction models so as to minimize a function that includes a sum total of errors indicating consistency with data and a regularization term deriving sparsity relating to differences between the prediction models, to estimate the prediction models.Type: ApplicationFiled: November 8, 2016Publication date: September 12, 2019Applicant: NEC CorporationInventors: Akira TANIMOTO, Yousuke MOTOHASHI, Ryohei FUJIMAKI
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Patent number: 10409338Abstract: A semiconductor device package includes a substrate including, on an edge thereof, a connector that is connectable to a host, a nonvolatile semiconductor memory device disposed on a surface of the substrate, a memory controller disposed on the surface of the substrate, an oscillator disposed on the surface of the substrate and electrically connected to the memory controller, and a seal member sealing the nonvolatile semiconductor memory device, the memory controller, and the oscillator on the surface of the substrate.Type: GrantFiled: March 1, 2016Date of Patent: September 10, 2019Assignee: Toshiba Memory CorporationInventors: Manabu Matsumoto, Katsuya Murakami, Akira Tanimoto, Isao Ozawa, Yuji Karakane, Tadashi Shimazaki
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Patent number: 10276544Abstract: A semiconductor package includes a board, a plurality of semiconductor memory chips, a controller chip, and a sealing resin portion. The plurality of semiconductor memory chips are stacked in a thickness direction of the board. The controller chip is disposed between the board and the plurality of semiconductor memory chips or on a side of the plurality of semiconductor chips opposite to the board. The sealing resin portion seals the plurality of semiconductor memory chips and the controller chip. The plurality of semiconductor memory chips include at least one through via that penetrates one or more semiconductor memory chips of the plurality of semiconductor memory chips in the thickness direction of the board to be connected to the controller chip.Type: GrantFiled: March 2, 2018Date of Patent: April 30, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Manabu Matsumoto, Katsuya Murakami, Akira Tanimoto
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Publication number: 20190088623Abstract: A semiconductor package includes a board, a plurality of semiconductor memory chips, a controller chip, and a sealing resin portion. The plurality of semiconductor memory chips are stacked in a thickness direction of the board. The controller chip is disposed between the board and the plurality of semiconductor memory chips or on a side of the plurality of semiconductor chips opposite to the board. The sealing resin portion seals the plurality of semiconductor memory chips and the controller chip. The plurality of semiconductor memory chips include at least one through via that penetrates one or more semiconductor memory chips of the plurality of semiconductor memory chips in the thickness direction of the board to be connected to the controller chip.Type: ApplicationFiled: March 2, 2018Publication date: March 21, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Manabu Matsumoto, Katsuya Murakami, Akira Tanimoto
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Publication number: 20190067177Abstract: A semiconductor device includes a package substrate having a first surface and a second surface. A semiconductor chip is provided on the first surface of the package substrate and includes a semiconductor element. An adhesive is provided between the semiconductor chip and the package substrate. A metal bump is provided on the second surface. A package substrate is a multilayer substrate that includes first to fourth wiring layers and first to third resin layers. CTE1<CTE2<CTE3<CTE4 is satisfied where coefficients of thermal expansion of the semiconductor chip, the first to third resin layers, the first to fourth wiring layers, and the adhesive are CTE1 to CTE4, respectively. EM1>EM3>EM2>EM4 is satisfied where elastic moduli of the semiconductor chip, the first to third resin layers, the first to fourth wiring layers, and the adhesive are EM1 to EM4, respectively.Type: ApplicationFiled: March 2, 2018Publication date: February 28, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Akira TANIMOTO, Hideko MUKAIDA, Naoko NUMATA, Kenji MIYAWAKI
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Patent number: 10217701Abstract: A semiconductor device includes a package substrate having a first surface and a second surface. A semiconductor chip is provided on the first surface of the package substrate and includes a semiconductor element. An adhesive is provided between the semiconductor chip and the package substrate. A metal bump is provided on the second surface. A package substrate is a multilayer substrate that includes first to fourth wiring layers and first to third resin layers. CTE1<CTE2<CTE3<CTE4 is satisfied where coefficients of thermal expansion of the semiconductor chip, the first to third resin layers, the first to fourth wiring layers, and the adhesive are CTE1 to CTE4, respectively. EM1>EM3>EM2>EM4 is satisfied where elastic moduli of the semiconductor chip, the first to third resin layers, the first to fourth wiring layers, and the adhesive are EM1 to EM4, respectively.Type: GrantFiled: March 2, 2018Date of Patent: February 26, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Akira Tanimoto, Hideko Mukaida, Naoko Numata, Kenji Miyawaki
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Publication number: 20180082185Abstract: Predictive model evaluation means 81 evaluates closeness in property between a relearned predictive model and a pre-relearning predictive model. Predictive model updating means 82 updates the pre-relearning predictive model with the relearned predictive model, in the case where the closeness in property meets closeness prescribed by a predetermined condition. The predictive model evaluation means 81 evaluates closeness in prediction result or structural closeness, as the closeness in property of the predictive model.Type: ApplicationFiled: March 23, 2015Publication date: March 22, 2018Applicant: NEC CORPORATIONInventors: Akira TANIMOTO, Yousuke MOTOHASHI
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Publication number: 20180075360Abstract: An accuracy estimation unit 91 estimates accuracy of a predictive model using an accuracy estimating model that is learned using, as an explanatory variable, all or part of one or more contexts each indicating a feature value representing an operation status of the predictive model at a first point of interest that is a past point in time of interest a learning period of the predictive model, and a parameter used to learn the predictive model and, as a response variable, an accuracy index in a period after the first point of interest. The accuracy estimation unit 91 calculates the context at a second point of interest that is a point in time after the first point of interest, and applies the calculated context to the accuracy estimating model to estimate the accuracy from the second point of interest onward.Type: ApplicationFiled: March 8, 2016Publication date: March 15, 2018Inventors: Akira TANIMOTO, Junpei KOMIYAMA, Yousuke MOTOHASHI, Ryohei FUJIMAKI, Yasuhiro SOGAWA
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Publication number: 20180075630Abstract: A storage unit 81 stores information associating each of a plurality of prediction targets with a predictor-related index related to a predictor for predicting the prediction target. Scatter graph generation means 82 generates, based on the information stored in the storage unit 81, a scatter graph in which a symbol representing the prediction target of the predictor is located at a position determined by the predictor-related index in a coordinate space where the predictor-related index is defined as at least one dimension.Type: ApplicationFiled: March 23, 2015Publication date: March 15, 2018Applicant: NEC CorporationInventors: Akira TANIMOTO, Yousuke MOTOHASHI, Hiroki NAKATANI, Hiroshi KITAJIMA
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Patent number: 9911502Abstract: According to one embodiment, a data storage device includes a controller driven by a first power supply voltage, a nonvolatile memory controlled by the controller and driven by a second power supply voltage, and a switch element determining whether the second power supply voltage is applied to the nonvolatile memory. The controller is configured to turn off the switch element in a first mode and turn on the switch element in a second mode.Type: GrantFiled: June 14, 2017Date of Patent: March 6, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Koichi Nagai, Katsuya Murakami, Shinji Honjo, Satoru Fukuchi, Akira Tanimoto, Isao Ozawa
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Publication number: 20180052441Abstract: Reception means 81 receives an estimator learned using measured data up to a point of time in the past, verification data that is measured data from the point of time onward, and an update rule prescribing whether or not the estimator needs to be updated based on an evaluation index. Simulation means 82 simulates at least one of the evaluation index of the estimator and an update result of the estimator in a predetermined period, based on the update rule and an estimation result calculated by applying the verification data of the predetermined period to the estimator in chronological order.Type: ApplicationFiled: March 23, 2015Publication date: February 22, 2018Applicants: NEC CORPORATION, NEC Solution Innovators, Ltd.Inventors: Akira TANIMOTO, Yousuke MOTOHASHI, Mamoru IGUCHI
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Publication number: 20180039901Abstract: A predictor management system includes a storage unit 81 and update history management means 82. The storage unit 81 stores, in association with each of a plurality of prediction targets, an update history of a predictor corresponding to the prediction target. The update history management means 82 stores, in response to updating of a predictor, a prediction target of the predictor and an update time of the predictor in the storage unit 81 in association with each other.Type: ApplicationFiled: March 23, 2015Publication date: February 8, 2018Applicant: NEC CORPORATIONInventors: Akira TANIMOTO, Yousuke MOTOHASHI, Hiroki NAKATANI