Patents by Inventor Akira Yamagiwa
Akira Yamagiwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6580295Abstract: A signal transmission system includes a first circuit block having a first output circuit for producing a first signal, a plurality of second circuit blocks each including a first receiving circuit for receiving the first signal, and transmission lines connected between the first circuit block and the second circuit blocks, wherein the first circuit block further includes a second output circuit for producing a second signal, and wherein each of the second circuit blocks further includes a second receiving circuit for receiving the second signal, the first receiving circuit latching the first signal in synchronism with the second signal, removing the unsuccessfulness in the signal transmission and reception due to the propagation delay of signals between circuits.Type: GrantFiled: February 7, 2001Date of Patent: June 17, 2003Assignee: Hitachi, Ltd.Inventors: Toshitsugu Takekuma, Akira Yamagiwa, Takashi Moriyama, Ryoichi Kurihara
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Publication number: 20030016050Abstract: A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.Type: ApplicationFiled: September 12, 2002Publication date: January 23, 2003Inventors: Toshitsuqu Takekuma, Ryoichi Kurihara, Akira Yamagiwa
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Publication number: 20020195718Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: ApplicationFiled: August 21, 2002Publication date: December 26, 2002Applicant: HITACHI, LTD.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Publication number: 20020192865Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: ApplicationFiled: August 21, 2002Publication date: December 19, 2002Applicant: HITACHI, LTD. and HITACHI HOKKAI SEMICONDUCTOR, LTD.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Patent number: 6496886Abstract: In a printed board mounting method using a directional coupling bus for a high-speed data transfer, multi-bit data are transferred between nodes at a low cost. For this purpose, to transfer multi-bit data by directional coupling, a one-bit multi-coupling wiring network is vertically configured in a multilayered printed board. This minimizes the width of an area occupied by each bit along a wiring direction of the board to thereby implement a multi-bit configuration.Type: GrantFiled: October 28, 1999Date of Patent: December 17, 2002Assignee: Hitachi, Ltd.Inventors: Hideki Osaka, Toyohiko Komatsu, Masahiro Kitano, Akira Yamagiwa, Ryoichi Kurihara
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Publication number: 20020175701Abstract: A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.Type: ApplicationFiled: July 15, 2002Publication date: November 28, 2002Inventors: Toshitsugu Takekuma, Ryoichi Kurihara, Akira Yamagiwa
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Patent number: 6461896Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: GrantFiled: May 5, 2000Date of Patent: October 8, 2002Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Patent number: 6441638Abstract: A bus system with an improved propagation velocity, comprising main lines, and a plurality of stub lines provided on a one-to-one correspondence with a plurality of modules, and connecting the corresponding modules to the main lines.Type: GrantFiled: December 17, 1998Date of Patent: August 27, 2002Assignee: Hitachi, Ltd.Inventors: Hideki Osaka, Shinichi Suzuki, Akira Yamagiwa, Toshiro Takahashi
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Patent number: 6441639Abstract: A signal transmitting circuit includes one or more circuit blocks having a driving circuit and an intra-block transmission line for transmitting a signal produced by the driving circuit, one or more circuit blocks having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between both of the driving and receiving circuit blocks. Inter-block transmission line is terminated at one or two ends by one or two resistors having substantially the same impedance as the interblock transmission lien itself.Type: GrantFiled: November 21, 2000Date of Patent: August 27, 2002Assignee: Hitachi, LtdInventors: Toshitsugu Takekuma, Ryoichi Kurihara, Akira Yamagiwa
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Patent number: 6420900Abstract: A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.Type: GrantFiled: June 27, 2001Date of Patent: July 16, 2002Assignee: Hitachi, Ltd.Inventors: Toshitsugu Takekuma, Ryoichi Kurihara, Akira Yamagiwa
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Publication number: 20020008539Abstract: A bus system with an improved propagation velocity, comprising main lines, and a plurality of stub lines provided on a one-to-one correspondence with a plurality of modules, and connecting the corresponding modules to the main lines.Type: ApplicationFiled: December 17, 1998Publication date: January 24, 2002Inventors: HIDEKI OSAKA, SHINICHI SUZUKI, AKIRA YAMAGIWA, TOSHIRO TAKAHASHI
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Patent number: 6335867Abstract: Apparatus for interconnecting logic boards is provided with a backplane, a plurality of logic boards connected to the backplane, and a plurality of interconnecting boards, connected to the backplane, for interconnecting the plurality of logic boards. In the apparatus, the plurality of logic boards are connected to the backplane with the logic boards in vertical position at right angles with the interconnecting boards and a specified distance away from the interconnecting boards.Type: GrantFiled: November 9, 2000Date of Patent: January 1, 2002Assignee: Hitachi, Ltd.Inventors: Kenichi Ishibashi, Takehisa Hayashi, Tsutomu Goto, Akira Yamagiwa, Tsuyoshi Watanabe
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Publication number: 20010035769Abstract: A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.Type: ApplicationFiled: June 27, 2001Publication date: November 1, 2001Inventors: Toshitsugu Takekuma, Ryoichi Kurihara, Akira Yamagiwa
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Patent number: 6266242Abstract: The present invention provides an information processing apparatus that may be designed in small and thin size and a small and thin CPU module that has a high heat releasing effect and is suitable therefor. The CPU module includes a processor, a connector to be electrically connected to the outside, a system control circuit for controlling transfer of a signal between the processor and the connector, and a printed board on which the processor, the connector and the system control circuit are mounted. The CPU module further provides a heat release plate one side of which is pasted with the printed board and the other side of which is substantially planar. The printed board has a cavity formed therein so that the processor may be fitted in the cavity in a bare-chip state. One side of the bare chip is jointed with the heat release plate.Type: GrantFiled: April 25, 2000Date of Patent: July 24, 2001Assignee: Hitachi, Ltd.Inventors: Takashi Maruyama, Akira Yamagiwa, Ryoichi Kurihara, Masakazu Sakaue, Yasuhiro Uemura, Mikihiro Tanaka
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Publication number: 20010005146Abstract: A signal transmission system includes a first circuit block having a first output circuit for producing a first signal, a plurality of second circuit blocks each including a first receiving circuit for receiving the first signal, and transmission lines connected between the first circuit block and the second circuit blocks, wherein the first circuit block further includes a second output circuit for producing a second signal, and wherein each of the second circuit blocks further includes a second receiving circuit for receiving the second signal, the first receiving circuit latching the first signal in synchronism with the second signal, removing the unsuccessfulness in the signal transmission and reception due to the propagation delay of signals between circuits.Type: ApplicationFiled: February 7, 2001Publication date: June 28, 2001Inventors: Toshitsugu Takekuma, Akira Yamagiwa, Takashi Moriyama, Ryoichi Kurihara
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Publication number: 20010002163Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: ApplicationFiled: January 26, 2001Publication date: May 31, 2001Applicant: Hitachi, Ltd.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Publication number: 20010002162Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: ApplicationFiled: January 26, 2001Publication date: May 31, 2001Applicant: Hitachi, Ltd.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Patent number: 6211703Abstract: A signal transmission system includes a first circuit block having a first output circuit for producing a first signal, a plurality of second circuit blocks each including a first receiving circuit for receiving the first signal, and transmission lines connected between the first circuit block and the second circuit blocks, wherein the first circuit block further includes a second output circuit for producing a second signal, and wherein each of the second circuit blocks further includes a second receiving circuit for receiving the second signal, the first receiving circuit latching the first signal in synchronism with the second signal, removing the unsuccessfulness in the signal transmission and reception due to the propagation delay of signals between circuits.Type: GrantFiled: June 5, 1997Date of Patent: April 3, 2001Assignee: Hitachi, Ltd.Inventors: Toshitsugu Takekuma, Akira Yamagiwa, Takashi Moriyama, Ryoichi Kurihara
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Patent number: 6208525Abstract: An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.Type: GrantFiled: March 26, 1998Date of Patent: March 27, 2001Assignees: Hitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.Inventors: Satoshi Imasu, Ikuo Yoshida, Tetsuya Hayashida, Akira Yamagiwa, Shinobu Takeura
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Patent number: 6172517Abstract: A signal transmitting circuit includes one or more circuit blocks having a driving circuit and an intra-block transmission line for transmitting a signal produced by the driving circuit, one or more circuit blocks having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between both of the driving and receiving circuit blocks. Inter-block transmission line is terminated at one or two ends by one or two resistors having substantially the same impedance as the interblock transmission line itself.Type: GrantFiled: May 26, 1998Date of Patent: January 9, 2001Assignee: Hitachi, Ltd.Inventors: Toshitsugu Takekuma, Ryoichi Kurihara, Akira Yamagiwa