Abstract: The memory device includes a memory block with an array of memory cells that are arranged word lines. The memory device also includes circuitry that is configured to program the memory cells of a selected word line of the plurality of word lines. During programming, the circuitry is configured to, in a program loop, apply a programming pulse at a programming voltage VPGM to a selected word line to program a plurality of the memory cells of the selected word line to a target data state. The circuitry is also configured to suspend the programming operation for a suspension duration and then resume the programming operation. Before a next program loop, the circuitry is further configured to increase a programming voltage VPGM by a step size that is determined based on the suspension duration and on the targeted data state.

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells configured to retain a threshold voltage corresponding to one of a plurality of data states. The memory cells are disposed in memory holes grouped in blocks. A control means is configured to determine an amount of the memory cells of one of the blocks that are programmed during at least one read operation. The control means adjusts at least one read parameter based on the amount of the memory cells of the one of the blocks that are programmed. The control means is also configured to utilize the adjusted at least one read parameter while reading the memory cells to determine if the memory cells have the threshold voltage above one or more read levels associated with each of the plurality of data states in the at least one read operation.

Abstract: An apparatus comprising a set of memory cells and a control circuit coupled to the set of memory cells is disclosed. The control circuit is configured to: transition a wordline voltage of a wordline associated with a target memory cell of the set of memory cells from a first wordline voltage level to a second wordline voltage level; subsequent to transitioning the wordline voltage to the second wordline voltage level, ramp down a bitline voltage of a bitline associated with the target memory cell from a first bitline voltage level to a second bitline voltage level; and prior to sensing a state of the memory cell, ramp up the bitline voltage from the second bitline voltage level to the first bitline voltage level.

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells disposed in memory holes connected to bit lines. The memory cells are configured to retain a threshold voltage corresponding to data states. The memory holes are grouped into a plurality of blocks. A control means is coupled to the bit lines and is configured to determine an amount of the memory cells of one of the plurality blocks that are programmed. The control means adjusts a bit line voltage based on the amount of the memory cells of the one of the plurality blocks that are programmed. The control means applies the adjusted bit line voltage to the plurality of bit lines while reading the memory cells to determine whether the memory cells have the threshold voltage above one or more of read levels associated with the data states in a read operation.

Abstract: The present disclosure relates to a cassette and a tissue embedding method using the cassette. The cassette includes a frame, a cover and a base. The frame defines an accommodating cavity through a first face and a second face of the frame arranged oppositely in a first direction. The cover is detachably mounted to the frame. The base is detachably mounted to the frame, and the base and the cover are configured to hold and orient a tissue sample therebetween. The base is slidable relative to the frame in a second direction different from the first direction to open and close the accommodating cavity.

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to one of a plurality of word lines and disposed in memory holes each coupled to one of a plurality of bit lines. The memory cells are configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the plurality of word lines and the memory holes and is configured to read the memory cells in a read operation. The control means is also configured to adjust at least one word line read timing and ramping parameter used during the read operation based on an amount of cycling of the memory cells.

Abstract: A system for drawing a solution is provided. The system includes a filter, a vacuum source, and an actuator. The filter has an input port, a first output port, a second output port, and a flow path defined in part by the input port and the second output port. The vacuum source is in fluid communication with the first output port and operative to apply a vacuum to the flow path. The actuator is operative to facilitate movement of the solution along the flow path.

Abstract: A system for drawing a solution is provided. The system includes a filter, a vacuum source, and an actuator. The filter has an input port, a first output port, a second output port, and a flow path defined in part by the input port and the second output port. The vacuum source is in fluid communication with the first output port and operative to apply a vacuum to the flow path. The actuator is operative to facilitate movement of the solution along the flow path.

Abstract: A memory apparatus includes an interconnect in a first dielectric above a substrate and a structure above the interconnect, where the structure includes a diffusion barrier material and covers the interconnect. The memory apparatus further includes a resistive random-access memory (RRAM) device coupled to the interconnect. The RRAM device includes a first electrode on a portion of the structure, a stoichiometric layer having a metal and oxygen on the first electrode, a non-stoichiometric layer including the metal and oxygen on the stoichiometric layer. A second electrode including a barrier material is on the non-stoichiometric layer. In some embodiments, the RRAM device further includes a third electrode on the second electrode. To prevent uncontrolled oxidation during a fabrication process a spacer may be directly adjacent to the RRAM device, where the spacer includes a second dielectric.

Abstract: A memory device structure includes a first electrode, a second electrode, a switching layer between the first electrode and the second electrode, where the switching layer is to transition between first and second resistive states at a voltage threshold. The memory device further includes an oxygen exchange layer between the switching layer and the second electrode, where the oxygen exchange layer includes a metal and a sidewall oxide in contact with a sidewall of the oxygen exchange layer. The sidewall oxide includes the metal of the oxygen exchange layer and oxygen, and has a lateral thickness that exceed a thickness of the switching layer.

Abstract: An RRAM device is disclosed. The RRAM device includes a bottom electrode, a high-k material on the bottom electrode, a top electrode, a top contact on the top electrode and an encapsulating layer of Al2O3. The encapsulating layer encapsulates the bottom electrode, the high-k material, the top electrode and the top contact.

Abstract: A sensor system in a package, comprising: a package, the package including: a sensor chip comprising sensor array comprising a plurality of sensing elements, wherein each of the plurality of sensing elements are functionalized with a deposited mixture consisting of hybrid nanostructures and a molecular formulation specifically targeting at least one of a plurality of gases, and wherein each of the plurality of sensing elements comprises a resistance and a capacitance, and wherein at least one resistance and capacitance are altered when the interacting with gaseous chemical compounds; and a mixed signal System on a Chip (SoC), comprising an analog signal conditioning and Analog-to-Digital conversion circuit configured to convert the analog signal into a digital signal, and a low-power processor circuit configured to processes the digital signal using a pattern recognition system implementing gas detection and measurement algorithms.

Abstract: Systems, devices, and methods for eyebox expansion in wearable heads-up display are described. The eyebox of a wearable heads-up display may be expanded by increasing the bandwidth of the hologram comprising the holographic combiner of the wearable heads-up display. The bandwidth of the hologram may be increased by physically coupling a donor film to a hologram film, causing donor material to diffuse into the hologram film and then fixing the donor material in place. Diffusion of donor material into the hologram film causes a change in the slant angle and/or the spacing of at least a portion of the hologram fringes of the hologram film, broadening the bandwidth of the hologram.

Abstract: A nanomaterial-based gas sensor system comprising a low voltage circuitry which includes a transducer to detect changes in electrical properties of a multi-channel gas sensor array, analog signal conditioning, and an A/D conversion to provide a signal to a digital back-end.

Abstract: A novel approach, based on hybrid nanostructure gas sensors, to correlate metrics related to specific medical conditions to a signature created by the sensor's response to the Volatile Organic Compounds (VOCs) contained in human breath.

Abstract: A device, comprising: an enclosure; a module within the disclosure, the module comprising: a package, the package including: a sensor chip comprising sensor array comprising a plurality of sensing elements, wherein each of the plurality of sensing elements are functionalized with a deposited mixture consisting of hybrid nanostructures and a molecular formulation specifically targeting at least one of a plurality of gases, and wherein each of the plurality of sensing elements comprises a resistance and a capacitance, and wherein at least one resistance and capacitance are altered when the interacting with gaseous chemical compounds, and a mixed signal System on a Chip (SoC), comprising an analog signal conditioning and Analog-to-Digital conversion circuit configured to convert the analog signal into a digital signal, and a low-power processor circuit configured to processes the digital signal using a pattern recognition system implementing gas detection and measurement algorithms; and a particulate matter sens

Abstract: A system for hyperpolarizing a substance is provided. The system includes a cryostat and a polarizer. The cryostat is operative to generate radicals within the substance by exposing the substance to electromagnetic radiation. The polarizer is operative to hyperpolarize the substance via the radicals. Once the substance is polarized, the radicals contained within the substance are quenched by adjusting a temperature of the substance to greater than or equal to a melting point of the substance. In embodiments, the polarizer may then rapidly freeze the substance.

Abstract: Improved techniques for sensing and reporting power consumption from a single or multiple power supplies are disclosed. The disclosed techniques comprise integrated circuit solutions for sensing power. In some embodiments, an integrated circuit comprises circuitry for converting source voltage into a pulse-width modulation (PWM) signal and circuitry for modulating the PWM signal with a current sense signal to determine sensed power.

Abstract: A system for drawing a solution is provided. The system includes a filter, a vacuum source, and an actuator. The filter has an input port, a first output port, a second output port, and a flow path defined in part by the input port and the second output port. The vacuum source is in fluid communication with the first output port and operative to apply a vacuum to the flow path. The actuator is operative to facilitate movement of the solution along the flow path.