Abstract: Some embodiments include ferroelectric assemblies. Some embodiments include a capacitor which has ferroelectric insulative material between a first electrode and a second electrode. The capacitor also has a metal oxide between the second electrode and the ferroelectric insulative material. The metal oxide has a thickness of less than or equal to about 30 ?. Some embodiments include a method of forming an assembly. A first capacitor electrode is formed over a semiconductor-containing base. Ferroelectric insulative material is formed over the first electrode. A metal-containing material is formed over the ferroelectric insulative material. The metal-containing material is oxidized to form a metal oxide from the metal-containing material. A second electrode is formed over the metal oxide.

Abstract: A ferroelectric device includes an electrode, another electrode, and a ferroelectric structure between the electrode and the another electrode. The ferroelectric structure includes one or more portions of bismuth oxide, and one or more portions of at least one metal oxide comprising hafnium-containing oxide, zirconium-containing oxide, or a combination thereof. A ferroelectric memory cell includes a source region, a drain region, and a capacitor in electrical communication with the drain region. The capacitor includes an electrode and a ferroelectric structure neighboring the electrode. The ferroelectric structure includes a first material comprising a first metal oxide, a second material comprising bismuth oxide, and a third material comprising a second metal oxide. The ferroelectric structure also includes a dopant in an amount of between about 0.1 atomic percent and about 25.0 atomic percent based on non-oxygen atoms of the ferroelectric structure.

Abstract: Memory circuitry comprises vertically-alternating tiers of insulative material and memory cells. The memory cells individually comprising a transistor comprise a first source/drain region, a second source/drain region, and a channel region between the first and second source/drain regions. A gate is operatively-proximate the channel region. A capacitor comprises a first capacitor electrode, a second capacitor electrode, and a capacitor insulator between the first and second capacitor electrodes. The first capacitor electrode is directly electrically coupled to the first source/drain region. The second capacitor electrode of multiple of the capacitors is directly electrically coupled with one another. Digitlines extend elevationally through the vertically-alternating tiers. Individual of the second source/drain regions of individual of the transistors that are in different memory-cell tiers are directly electrically coupled to individual of the digitlines.

Abstract: A semiconductor structure includes an electrode, a ferroelectric material adjacent the electrode, the ferroelectric material comprising an oxide of at least one of hafnium and zirconium, the ferroelectric material doped with bismuth, and another electrode adjacent the ferroelectric material on an opposite side thereof from the first electrode. Related semiconductor structures, memory cells, semiconductor devices, electronic systems, and related methods are disclosed.

Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.

Abstract: Some embodiments include a ferroelectric device having a ferroelectric insulative material which includes zinc. Some embodiments include a capacitor having a ferroelectric insulative material between a first electrode and a second electrode. The ferroelectric insulative material includes one or more metal-oxide-containing layers and one or more zinc-containing layers. Some embodiments include a memory array having a first set of first conductive structures and a second set of second conductive structures. The first conductive structures are coupled with driver circuitry, and the second conductive structures are coupled with sensing circuitry. The memory array includes an array of access devices. Each of the access devices is uniquely addressed by one of the first conductive structures in combination with one of the second conductive structures. Ferroelectric capacitors are coupled with the access devices. Each of the ferroelectric capacitors includes ferroelectric insulative material having zinc.

Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.

Abstract: Some embodiments include ferroelectric assemblies. Some embodiments include a capacitor which has ferroelectric insulative material between a first electrode and a second electrode. The capacitor also has a metal oxide between the second electrode and the ferroelectric insulative material. The metal oxide has a thickness of less than or equal to about 30 ?. Some embodiments include a method of forming an assembly. A first capacitor electrode is formed over a semiconductor-containing base. Ferroelectric insulative material is formed over the first electrode. A metal-containing material is formed over the ferroelectric insulative material. The metal-containing material is oxidized to form a metal oxide from the metal-containing material. A second electrode is formed over the metal oxide.

Abstract: A ferroelectric capacitor comprises two conductive capacitor electrodes having ferroelectric material there-between. At least one of the capacitor electrodes comprise MxSiOy, where “M” is at least one of Ru, Ti, Ta, Co, Pt, Ir, Os, Mo, V, W, Sr, Re, Rh, Pd, La, Zn, In, Sig, and Nb, Other aspects, including method, are disclosed.

Abstract: Some embodiments include ferroelectric assemblies. Some embodiments include a capacitor which has ferroelectric insulative material between a first electrode and a second electrode. The capacitor also has a metal oxide between the second electrode and the ferroelectric insulative material. The metal oxide has a thickness of less than or equal to about 30 ?. Some embodiments include a method of forming an assembly. A first capacitor electrode is formed over a semiconductor-containing base. Ferroelectric insulative material is formed over the first electrode. A metal-containing material is formed over the ferroelectric insulative material. The metal-containing material is oxidized to form a metal oxide from the metal-containing material. A second electrode is formed over the metal oxide.

Abstract: The present disclosure relates to aptamers, polynucleotides, and nuclei acid molecules, which include a polynucleotide sequence capable of specifically binding polypeptides participating in M. hyopneumoniae infection. Also provided are methods of using nucleic acid molecules, polynucleotides and synthetic antibodies directed there against for detection, treating and neutralization of M. hyopneumoniae infection.

Abstract: Some embodiments include ferroelectric assemblies. Some embodiments include a capacitor which has ferroelectric insulative material between a first electrode and a second electrode. The capacitor also has a metal oxide between the second electrode and the ferroelectric insulative material. The metal oxide has a thickness of less than or equal to about 30 ?. Some embodiments include a method of forming an assembly. A first capacitor electrode is formed over a semiconductor-containing base. Ferroelectric insulative material is formed over the first electrode. A metal-containing material is formed over the ferroelectric insulative material. The metal-containing material is oxidized to form a metal oxide from the metal-containing material. A second electrode is formed over the metal oxide.

Abstract: Some embodiments include ferroelectric assemblies. Some embodiments include a capacitor which has ferroelectric insulative material between a first electrode and a second electrode. The capacitor also has a metal oxide between the second electrode and the ferroelectric insulative material. The metal oxide has a thickness of less than or equal to about 30 ?. Some embodiments include a method of forming an assembly. A first capacitor electrode is formed over a semiconductor-containing base. Ferroelectric insulative material is formed over the first electrode. A metal-containing material is formed over the ferroelectric insulative material. The metal-containing material is oxidized to form a metal oxide from the metal-containing material. A second electrode is formed over the metal oxide.

Abstract: A semiconductor structure includes an electrode, a ferroelectric material adjacent the electrode, the ferroelectric material comprising an oxide of at least one of hafnium and zirconium, the ferroelectric material doped with bismuth, and another electrode adjacent the ferroelectric material on an opposite side thereof from the first electrode. Related semiconductor structures, memory cells, semiconductor devices, electronic systems, and related methods are disclosed.

Abstract: A semiconductor structure includes an electrode, a ferroelectric material adjacent the electrode, the ferroelectric material comprising an oxide of at least one of hafnium and zirconium, the ferroelectric material doped with bismuth, and another electrode adjacent the ferroelectric material on an opposite side thereof from the first electrode. Related semiconductor structures, memory cells, semiconductor devices, electronic systems, and related methods are disclosed.

Abstract: The present invention relates to aptamers, polynucleotides, and nucleic acid molecules, which include a polynucleotide sequence capable of specifically binding polypeptides participating in M. hyopneumoniae infection. Also provided are methods of using nucleic acid molecules, polynucleotides and synthetic antibodies directed there against for detection, treating and neutralization of M. hyopneumoniae infection.

Abstract: Some embodiments include a ferroelectric device having a ferroelectric insulative material which includes zinc. Some embodiments include a capacitor having a ferroelectric insulative material between a first electrode and a second electrode. The ferroelectric insulative material includes one or more metal-oxide-containing layers and one or more zinc-containing layers. Some embodiments include a memory array having a first set of first conductive structures and a second set of second conductive structures. The first conductive structures are coupled with driver circuitry, and the second conductive structures are coupled with sensing circuitry. The memory array includes an array of access devices. Each of the access devices is uniquely addressed by one of the first conductive structures in combination with one of the second conductive structures. Ferroelectric capacitors are coupled with the access devices. Each of the ferroelectric capacitors includes ferroelectric insulative material having zinc.

Abstract: The present disclosure relates to aptamers, polynucleotides, and nuclei acid molecules, which include a polynucleotide sequence capable of specifically binding polypeptides participating in M. Hyopneumoniae infection. Also provided are methods of using nucleic acid molecules, polynucleotides and synthetic antibodies directed there against for detection, treating and neutralization of M. Hyopneumoniae infection.

Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.

Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.