Abstract: An access encoder reduces power consumption during video playback and recording by reducing the bandwidth between a processor and a memory. A graphical user interface allows user selection, or software control, over the tradeoff between battery life and video quality. Battery life can be increased (decreased) by activating the access encoder. The access encoder may be implemented in a microprocessor, graphics processor, digital signal processor, FPGA, ASIC, or SoC. The access encoder's encoding/decoding can reduce memory and storage bottlenecks, processor access time, and processor and memory power consumption. A user interface allows users to adjust the tradeoff between decoded video quality and battery life for a mobile device. This abstract does not limit the scope of the invention as described in the claims.

Abstract: A hybrid access encoder includes one or more improvements to attenuation-based image and video encoders using images. The hybrid access encoder supports tradeoffs between encoded bit rate and decoded image and video quality. The hybrid access encoder monitors multiple redundancy removal filters and selects the best-performing filter for encoding. The hybrid access encoder operates in a mode that specifies a target decoded image quality and a target encoded bit rate, giving preference to one metric (image quality or bit rate) when both target values cannot be achieved. The hybrid access encoder performs a plurality of passes across each image and can optimize one or more parameters of the encoder settings between passes. A user interface allows users to control the tradeoff between decoded video quality and battery life for a mobile device.

Abstract: A method and apparatus for compressing signal samples uses block floating point representations where the number of bits per mantissa is determined by the maximum magnitude sample in the group. The compressor defines groups of signal samples having a fixed number of samples per group. The maximum magnitude sample in the group determines an exponent value corresponding to the number of bits for representing the maximum sample value. The exponent values are encoded to form exponent tokens. Exponent differences between consecutive exponent values may be encoded individually or jointly. The samples in the group are mapped to corresponding mantissas, each mantissa having a number of bits based on the exponent value. Removing LSBs depending on the exponent value produces mantissas having fewer bits. Feedback control monitors the compressed bit rate and/or a quality metric. This abstract does not limit the scope of the invention as described in the claims.

Abstract: A method and apparatus for compressing signal samples uses block floating point representations where the number of bits per mantissa is determined by the maximum magnitude sample in the group. The compressor defines groups of signal samples having a fixed number of samples per group. The maximum magnitude sample in the group determines an exponent value corresponding to the number of bits for representing the maximum sample value. The exponent values are encoded to form exponent tokens. Exponent differences between consecutive exponent values may be encoded individually or jointly. The samples in the group are mapped to corresponding mantissas, each mantissa having a number of bits based on the exponent value. Removing LSBs depending on the exponent value produces mantissas having fewer bits. Feedback control monitors the compressed bit rate and/or a quality metric. This abstract does not limit the scope of the invention as described in the claims.

Abstract: Access encoding/decoding of image data has at least two preferred access modes, raster access and macroblock access. Arriving rasters containing pixels from an image sensor are converted to encoded macroblocks to support later random macroblock and raster access. Encoded macroblocks can be randomly accessed (read from or written to memory) by block-based video compression algorithms, such as H.264. Encoded macroblocks can also be decoded raster by raster for raster-oriented display devices. Access encoding/decoding may be implemented in a microprocessor, graphics processor, digital signal processor, FPGA, ASIC, or SoC. Access encoding/decoding of image data or reference frames can reduce memory and storage bottlenecks, processor access time, and processor and memory power consumption. A user interface can allow users to control the tradeoff between decoded video quality and battery life for a mobile device. This abstract does not limit the scope of the invention as described in the claims.

Abstract: A method and an apparatus for an ultrasound system provide compression of ultrasound signal samples after analog to digital conversion and before beamforming. The analog ultrasound signals received from an array of ultrasound transducer elements are digitally sampled by a plurality of analog to digital converters (ADCs) to produce a plurality of sequences of signal samples. Each sequence of signal samples is compressed to form a corresponding sequence of compressed samples. The resulting sequences of compressed samples are transferred via a digital interface to an ultrasound signal processor. At the ultrasound signal processor, the received sequences of compressed samples are decompressed. The typical processing operations, such as beamforming, downconversion and detection, are applied to decompressed samples. This abstract does not limit the scope of the invention as described in the claims.

Abstract: Compression and decompression of numerical data utilizing single instruction, multiple data (SIMD) instructions is described. The numerical data includes integer and floating-point samples. Compression supports three encoding modes: lossless, fixed-rate, and fixed-quality. SIMD instructions for compression operations may include attenuation, derivative calculations, bit packing to form compressed packets, header generation for the packets, and packed array output operations. SIMD instructions for decompression may include packed array input operations, header recovery, decoder control, bit unpacking, integration, and amplification. Compression and decompression may be implemented in a microprocessor, digital signal processor, field-programmable gate array, application-specific integrated circuit, system-on-chip, or graphics processor, using SIMD instructions. Compression and decompression of numerical data can reduce memory, networking, and storage bottlenecks.

Abstract: An execution unit configured for compression and decompression of numerical data utilizing single instruction, multiple data (SIMD) instructions is described. The numerical data includes integer and floating-point samples. Compression supports three encoding modes: lossless, fixed-rate, and fixed-quality. SIMD instructions for compression operations may include attenuation, derivative calculations, bit packing to form compressed packets, header generation for the packets, and packed array output operations. SIMD instructions for decompression may include packed array input operations, header recovery, decoder control, bit unpacking, integration, and amplification. Compression and decompression may be implemented in a microprocessor, digital signal processor, field-programmable gate array, application-specific integrated circuit, system-on-chip, or graphics processor, using SIMD instructions. Compression and decompression of numerical data can reduce memory, networking, and storage bottlenecks.

Abstract: A signal compression method and apparatus for a base transceiver system (BTS) in a wireless communication network provides efficient transfer of compressed signal samples over serial data links in the system. For the uplink, an RF unit of the BTS compresses baseband signal samples resulting from analog to digital conversion of a received analog signal followed by digital downconversion. The compressed signal samples are transferred over the serial data link to the baseband processor then decompressed prior to normal signal processing. For the downlink, the baseband processor compresses baseband signal samples and transfers the compressed signal samples to the RF unit. The RF unit decompresses the compressed samples prior to digital upconversion and digital to analog conversion to form an analog signal for transmission over an antenna. Compression and decompression can be incorporated into operations of conventional base stations and distributed antenna systems, including OBSAI or CPRI compliant systems.

Abstract: A method and apparatus for determining one or more compression parameters suitable to compress a class of signals, may include inputting a test data set, being representative of a data set to be compressed, characterizing the test data, selecting a compression algorithm, calculating a distortion level to be used in determining the compression ratio (or a compression ratio to be used in determining the distortion level), generating a computer implemented model for the test data, selecting a recommended operating point based on a computer implemented model, and determining compression parameters corresponding to the operating point. The compression parameters may subsequently be applied for configuration of compression applied to one or more production data sets that are similar to the test data. This abstract does not limit the scope of the invention as described in the claims.

Abstract: Configurable compression and decompression of waveform data in a multi-core processing environment improves the efficiency of data transfer between cores and conserves data storage resources. In waveform data processing systems, input, intermediate, and output waveform data are often exchanged between cores and between cores and off-chip memory. At each core, a single configurable compressor and a single configurable decompressor can be configured to compress and to decompress integer or floating-point waveform data. At the memory controller, a configurable compressor compresses integer or floating-point waveform data for transfer to off-chip memory in compressed packets and a configurable decompressor decompresses compressed packets received from the off-chip memory. Compression reduces the memory or storage required to retain waveform data in a semiconductor or magnetic memory. Compression reduces both the latency and the bandwidth required to exchange waveform data.

Abstract: In a distributed antenna system (DAS) and a local area network (LAN), a common communication infrastructure distributes data from radio-based and Internet-based sources. A radio equipment (RE) of the DAS interfaces to a LAN segment. For the downlink, a gateway maps radio signal data from a radio equipment controller (REC) and data packets from a switch to mixed-data frames using a radio data interface protocol for transmission in the DAS. At the RE, the signal data and data packets are retrieved from the mixed-data frames and provided to the air interface and LAN segment, respectively. For the uplink from the RE, the radio signal data from the air interface and the data packets from the LAN segment are mapped to mixed-data frames and transmitted to the gateway. The gateway retrieves the signal samples and data packets from the mixed-data frames for transfer to the REC and switch, respectively.

Abstract: In a distributed antenna system (DAS) and a local area network (LAN), a common communication infrastructure distributes data from radio-based and Internet-based sources. A radio equipment (RE) of the DAS interfaces to a LAN segment. For the downlink, a gateway maps radio signal data from a radio equipment controller (REC) and data packets from a switch to mixed-data frames using a radio data interface protocol for transmission in the DAS. At the RE, the signal data and data packets are retrieved from the mixed-data frames and provided to the air interface and LAN segment, respectively. For the uplink from the RE, the radio signal data from the air interface and the data packets from the LAN segment are mapped to mixed-data frames and transmitted to the gateway. The gateway retrieves the signal samples and data packets from the mixed-data frames for transfer to the REC and switch, respectively.

Abstract: Configurable compression and decompression of waveform data in a multi-core processing environment improves the efficiency of data transfer between cores and conserves data storage resources. In waveform data processing systems, input, intermediate, and output waveform data are often exchanged between cores and between cores and off-chip memory. At each core, a single configurable compressor and a single configurable decompressor can be configured to compress and to decompress integer or floating-point waveform data. At the memory controller, a configurable compressor compresses integer or floating-point waveform data for transfer to off-chip memory in compressed packets and a configurable decompressor decompresses compressed packets received from the off-chip memory. Compression reduces the memory or storage required to retain waveform data in a semiconductor or magnetic memory. Compression reduces both the latency and the bandwidth required to exchange waveform data.

Abstract: Memory system operations are extended for a data processor by DMA, cache, or memory controller to include a DMA descriptor, including a set of operations and parameters for the operations, which provides for data compression and decompression during or in conjunction with processes for moving data between memory elements of the memory system. The set of operations can be configured to use the parameters and perform the operations of the DMA, cache, or memory controller. The DMA, cache, or memory controller can support moves between memory having a first access latency, such as memory integrated on the same chip as a processor core, and memory having a second access latency that is longer than the first access latency, such as memory on a different integrated circuit than the processor core.

Abstract: Compression and decompression of numerical data can apply to floating-point or integer samples. Floating-point samples are converted to integer samples and the integer samples are compressed and encoded to produce compressed data for compressed data packets. For decompression, the compressed data retrieved from compressed data packets are decompressed to produce decompressed integer samples. The decompressed integer samples may be converted to reconstruct floating-point samples. Adaptive architectures can be applied for integer compression and decompression using one or two FIFO buffers and one or two configurable adder/subtractors. Various parameters can adapt the operations of adaptive architectures as appropriate for different data characteristics. The parameters can be encoded for the compressed data packet. This abstract does not limit the scope of the invention as described in the claims.

Abstract: Memory system operations are extended for a data processor by an application programming interface API, including a set of operations and parameters for the operations, which provides for data compression and decompression during or in conjunction with processes for moving data between memory elements of the memory system. The set of operations can be configured to use the parameters and perform the operations of the API. The API can support moves between memory having a first access latency, such as memory integrated on the same chip as a processor core, and memory having a second access latency that is longer than the first access latency, such as memory on a different integrated circuit than the processor core.

Abstract: A raw format image representing an image received from an image capture device at an image data rate, can be compressed at least as fast as the image data rate (i.e. in real time) using compact and low cost components. The compressed image data can then be transferred across a chip-to-chip data channel to a memory system or to a host processor where it can be stored as compressed data. The host processor or other processor can read and decompress the compressed raw data and apply digital signal processing including industry-standard data compression or other image processing algorithms to the recovered raw format image without being constrained to real-time processing.

Abstract: A method and apparatus for compressing signal samples uses block floating point representations where the number of bits per mantissa is determined by the maximum magnitude sample in the group. The compressor defines groups of signal samples having a fixed number of samples per group. The maximum magnitude sample in the group determines an exponent value corresponding to the number of bits for representing the maximum sample value. The exponent values are encoded to form exponent tokens. Exponent differences between consecutive exponent values may be encoded individually or jointly. The samples in the group are mapped to corresponding mantissas, each mantissa having a number of bits based on the exponent value. Removing LSBs depending on the exponent value produces mantissas having fewer bits. Feedback control monitors the compressed bit rate and/or a quality metric. This abstract does not limit the scope of the invention as described in the claims.

Abstract: A method and apparatus for compressing signal samples uses block floating point representations where the number of bits per mantissa is determined by the maximum magnitude sample in the group. The compressor defines groups of signal samples having a fixed number of samples per group. The maximum magnitude sample in the group determines an exponent value corresponding to the number of bits for representing the maximum sample value. The exponent values are encoded to form exponent tokens. Exponent differences between consecutive exponent values may be encoded individually or jointly. The samples in the group are mapped to corresponding mantissas, each mantissa having a number of bits based on the exponent value. Removing LSBs depending on the exponent value produces mantissas having fewer bits. Feedback control monitors the compressed bit rate and/or a quality metric. This abstract does not limit the scope of the invention as described in the claims.