Patents by Inventor Albert Wang

Albert Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7679024
    Abstract: A gas distribution arrangement configured to provide a process gas downstream to a plasma tube of a plasma processing chamber. The plasma tube has a top end. The arrangement includes a body having a first end. The first end has a width larger than the plasma tube and a protrusion end adapted to be inserted into the top end. The arrangement also includes a gas inlet vertically disposed in the body. The gas inlet extends from the first end toward the protrusion end and the gas inlet terminates before extending through the protrusion end. The arrangement further includes a plurality of directional inlet channels extending from a lower end of the gas inlet through the protrusion end.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: March 16, 2010
    Assignee: Lam Research Corporation
    Inventors: Ing-Yann Albert Wang, Mohammad Kamarehi
  • Publication number: 20090278054
    Abstract: A method for minimizing microwave leakage into processing chamber of a microwave plasma system is provided. The method includes securing plasma traps to a plasma tube assembly, which is a cylindrical structure positioned upstream from the processing chamber and has a plasma-sustaining region. The plasma traps are electrically conductive disks surrounding the cylindrical structure and are positioned upstream from the processing chamber. The plasma traps include at least two electrically conductive disks. Each electrically conductive disk includes corrugated outer surfaces with plurality of corrugated peaks. The corrugated outer surface of the first electrically conductive disk is facing a corrugated outer surface of the second electrically conductive disk in a space-apart relationship to form an interstitial region between the electrically conductive disks.
    Type: Application
    Filed: July 16, 2009
    Publication date: November 12, 2009
    Inventors: Mohammad Kamarehi, Ing-Yann Albert Wang
  • Patent number: 7562638
    Abstract: An arrangement configured to contain plasma within plasma tube assembly of downstream microwave plasma system. Downstream microwave plasma system is configured to generate plasma within plasma-sustaining region of plasma tube assembly and channeling at least portion of plasma downstream to plasma processing chamber of downstream microwave plasma system. Arrangement includes a first hollow center electrically conductive disk surrounding a cylindrical structure that defines plasma passage of plasma tube assembly. Arrangement also includes a second hollow center electrically conductive disk also surrounding the cylindrical structure. Second hollow center electrically conductive disk is configured to be disposed in a spaced-apart relationship relative to first hollow center electrically conductive disk so as to form a first hollow center disk-shape interstitial region between first hollow center electrically conductive disc and second hollow center electrically conductive disc.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: July 21, 2009
    Assignee: Lam Research Corporation
    Inventors: Mohammad Kamarehi, Ing-Yann Albert Wang
  • Patent number: 7554053
    Abstract: A plasma system is disclosed. The plasma system includes a microwave waveguide assembly having a longitudinal axis parallel with a first axis. The plasma system also includes a plasma tube assembly intersecting the microwave waveguide assembly. The plasma tube assembly has a longitudinal axis parallel with a second axis that is substantially orthogonal with the first axis. The plasma tube assembly also has a plasma-sustaining region defined by an upstream plurality of plasma traps and a downstream plurality of plasma traps.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: June 30, 2009
    Assignee: Lam Research Corporation
    Inventors: Mohammad Kamarehi, Ing-Yann Albert Wang
  • Patent number: 7486134
    Abstract: An advanced balanced RF power amplifier circuit is provided. The RF power amplifier has a pair of RF amplification paths constructed to efficiently operate in a high-power mode. When instructed to operate in a low-power mode, one of the amplification paths is deactivated, and optionally, an impedance device is also set to operate at a low-power impedance value. With only one path operating in low-power mode, the network RF topology has changed from the topology of the high-power mode. This new topology provides increased impedance on the active RF amplification path as compared to when both RF amplification paths were active. This increased impedance causes the RF power amplifier to operate more efficiently in its low-power mode.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: February 3, 2009
    Assignee: Skyworks Solutions, Inc.
    Inventors: Shiaw W Chang, Albert Wang
  • Patent number: 7476291
    Abstract: A vacuum chamber for passivation and/or stripping a photoresist layer formed on a semiconductor substrate. The chamber includes an internal chamber body that forms a cavity to surround the substrate and has a plurality of gas passages extending therethrough to the cavity and one or more heaters to heat the internal chamber body. The internal chamber body is slidably mounted on an external chamber body that surrounds a side of the internal chamber with a gap therebetween. The device also includes: an exhaust unit operative to pump the gas from the cavity; a chamber top mounted on the internal chamber body to cover a top surface of the internal chamber body with a gap therebetween and having an opening in fluid communication with the gas passages; and a plasma source operative to energize the gas into a plasma state and coupled to the opening for fluid communication with the cavity.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: January 13, 2009
    Assignee: Lam Research Corporation
    Inventors: Ing-Yann Albert Wang, Robert Chebi
  • Publication number: 20080286489
    Abstract: A plasma processing chamber includes a substrate support having a top surface defined to support a substrate in a substantially horizontal orientation within the chamber. The plasma processing chamber also includes a number of telescopic members disposed within the chamber outside a periphery of the substrate support. The number of telescopic members are also disposed in a concentric manner with regard to a center of the top surface of the substrate support. Each of the number of telescopic members is defined to be independently moved in a substantially vertical direction so as to enable adjustment of an open volume above the top surface of the substrate support, and thereby enable adjustment of a plasma condition within the open volume above the top surface of the substrate support.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 20, 2008
    Applicant: Lam Research Corporation
    Inventors: Ing-Yann Albert Wang, Robert Chebi
  • Publication number: 20080218834
    Abstract: A microelectromechanical system (MEMS) is provided. In one embodiment, the MEMS includes a transparent substrate, and a plurality of interferometric modulators. The plurality of interferometric modulators includes an optical stack coupled to the transparent substrate, in which the optical stack includes a first light absorbing area. The plurality of interferometric modulators further includes a reflective layer over the optical stack, and one or more posts to support the reflective layer. Each of the one or more posts includes a second light absorbing area integrated in the post.
    Type: Application
    Filed: March 8, 2007
    Publication date: September 11, 2008
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventor: Chun-Ming Albert Wang
  • Patent number: 7373642
    Abstract: A method is provided for modifying a program written in a standard programming language so that when the program is compiled both an executable file is produced and an instruction is programmed into a programmable logic device of a processor system. The method includes identifying a critical code segment of a program, rewriting the critical code segment as a function, revising the program, and compiling the program. Revising the program includes designating the function as code to be compiled by an extension compiler and replacing the critical code segment of the program with a statement that calls the function. Compiling the program includes compiling the code with an extension compiler to produce a header file and the instruction for the programmable logic device. Compiling the program also includes using a standard compiler to compile the remainder of the program together with the header file to generate the executable file.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: May 13, 2008
    Assignee: Stretch, Inc.
    Inventors: Kenneth M Williams, Albert Wang
  • Patent number: 7366172
    Abstract: A system and method for correcting errors and losses occurring during a receiver-driven layered multicast (RLM) of real-time media over a heterogeneous packet network such as the Internet. This is accomplished by augmenting RLM with one or more layers of error correction information. This allows each receiver to separately optimize the quality of received audio and video information by subscribing to at least one error correction layer. Ideally, each source layer in a RLM would have one or more multicasted error correction data streams (i.e., layers) associated therewith. Each of the error correction layers would contain information that can be used to replace lost packets from the associated source layer. More than one error correction layer is proposed as some of the error correction packets contained in the data stream needed to replace the packets lost in the associated source stream may themselves be lost in transmission.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: April 29, 2008
    Assignee: Microsoft Corporation
    Inventors: Philip Chou, Albert Wang, Sanjeev Mehrotra, Alexander Mohr
  • Publication number: 20080078744
    Abstract: A vacuum chamber for passivation and/or stripping a photoresist layer formed on a semiconductor substrate. The chamber includes an internal chamber body that forms a cavity to surround the substrate and has a plurality of gas passages extending therethrough to the cavity and one or more heaters to heat the internal chamber body. The internal chamber body is slidably mounted on an external chamber body that surrounds a side of the internal chamber with a gap therebetween. The device also includes: an exhaust unit operative to pump the gas from the cavity; a chamber top mounted on the internal chamber body to cover a top surface of the internal chamber body with a gap therebetween and having an opening in fluid communication with the gas passages; and a plasma source operative to energize the gas into a plasma state and coupled to the opening for fluid communication with the cavity.
    Type: Application
    Filed: September 28, 2006
    Publication date: April 3, 2008
    Applicant: Lam Research Corporation
    Inventors: Ing-Yann Albert Wang, Robert Chebi
  • Publication number: 20080048774
    Abstract: An advanced balanced RF power amplifier circuit is provided. The RF power amplifier has a pair of RF amplification paths constructed to efficiently operate in a high-power mode. When instructed to operate in a low-power mode, one of the amplification paths is deactivated, and optionally, an impedance device is also set to operate at a low-power impedance value. With only one path operating in low-power mode, the network RF topology has changed from the topology of the high-power mode. This new topology provides increased impedance on the active RF amplification path as compared to when both RF amplification paths were active. This increased impedance causes the RF power amplifier to operate more efficiently in its low-power mode.
    Type: Application
    Filed: March 9, 2007
    Publication date: February 28, 2008
    Inventors: Shiaw Chang, Albert Wang
  • Patent number: 7200735
    Abstract: A new general method for building hybrid processors achieves higher performance in applications by allowing more powerful, tightly-coupled instruction set extensions to be implemented in reconfigurable logic. New instructions set configurations can be discovered and designed by automatic and semi-automatic methods. Improved reconfigurable execution units support deep pipelining, addition of additional registers and register files, compound instructions with many source and destination registers and wide data paths. New interface methods allow lower latency, higher bandwidth connections between hybrid processors and other logic.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: April 3, 2007
    Assignee: Tensilica, Inc.
    Inventors: Albert Wang, Christopher Rowen, Bernard Rosenthal
  • Publication number: 20070020386
    Abstract: Systems and methods for encapsulation of chemically amplified resist template for low pH electroplating are disclosed. In a first method embodiment, a resist template structure is formed on a wafer. Substantially all surfaces of the resist template structure are encapsulated to form an encapsulated structure. Magnetic materials are plated onto the encapsulated structure.
    Type: Application
    Filed: July 20, 2005
    Publication date: January 25, 2007
    Inventors: Daniel Bedell, John Lam, Matthew Last, Kim Lee, Jyh-Shuey Lo, Dennis McKean, Chun-Ming (Albert) Wang, Yi Zheng
  • Publication number: 20060259878
    Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
    Type: Application
    Filed: March 27, 2006
    Publication date: November 16, 2006
    Inventors: Earl Killian, Ricardo Gonzalez, Ashish Dixit, Monica Lam, Walter Lichtenstein, Christopher Rowen, John Ruttenberg, Robert Wilson, Albert Wang, Dror Maydan
  • Patent number: 7070697
    Abstract: In one illustrative example, a method of making a read sensor of a magnetic head involves forming a barrier structure which surrounds a central mask formed over a plurality of read sensor layers; etching the read sensor layers to form the read sensor below the mask; and depositing, with use of the mask and the barrier structure, hard bias and lead layers to form around the read sensor. The barrier structure may be formed by, for example, depositing one or more barrier structure layers over the read sensor layers and performing a photolithography process. The barrier structure physically blocks materials being deposited at relatively low angles (e.g. angles at or below 71 degrees) so as to reduce their formation far underneath the mask (e.g. when using a bridged mask), which could otherwise form an electrical short, and/or to improve the symmetry of the deposited materials around the read sensor.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: July 4, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: James Mac Freitag, Kim Yang Lee, Mustafa Pinarbasi, Chun-Ming Albert Wang
  • Publication number: 20060101369
    Abstract: A system for generating processor hardware supports a language for significant extensions to the processor instruction set, where the designer specifies only the semantics of the new instructions and the system generates other logic. The extension language provides for the addition of processor state, including register files, and instructions that operate on that state. The language also provides for new data types to be added to the compiler to represent the state added. It allows separate specification of reference semantics and instruction implementation, and uses this to automate design verification. In addition, the system generates formatted instruction set documentation from the language specification.
    Type: Application
    Filed: November 16, 2005
    Publication date: May 11, 2006
    Inventors: Albert Wang, Richard Ruddell, David Goodwin, Earl Killian, Nupur Bhattacharyya, Marines Medina, Walter Lichtenstein, Pavlos Konas, Rangarajan Srinivasan, Christopher Songer, Akilesh Parameswar, Dror Maydan, Ricardo Gonzalez
  • Patent number: 6986127
    Abstract: A debugging system and debugging techniques for configurable processors remove the requirement of foreknowledge of specific configurable processor information from components of the debugging system where obtaining that foreknowledge is costly. The system is part of an environment that generates a processor where the proper information is generated in the right forms for such use.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: January 10, 2006
    Assignee: Tensilica, Inc.
    Inventors: John Newlin, Albert Wang, Christopher M. Songer
  • Publication number: 20050273581
    Abstract: A processing system with reconfigurable instruction extensions includes a processor, programmable logic, a register file, and a load/store module. The processor executes a computer program comprising a set of computational instructions and at least one instruction extension. The programmable logic receives configuration information to configure the programmable logic for the instruction extension and executes the instruction extension. The register file is coupled to the programmable logic and stores data. The load/store module transfers the data directly between the register file and a system memory.
    Type: Application
    Filed: August 15, 2005
    Publication date: December 8, 2005
    Inventors: Jeffrey Arnold, Gareld Banta, Scott Johnson, Albert Wang
  • Publication number: 20050259877
    Abstract: An apparatus and method for encoding video frames is provided. The video frames are divided into blocks for encoding. Encoding of the video blocks utilizes motion detection, motion estimation and adaptive compression, to obtain the desired compression for a particular bit rate. Adaptive compression includes intra compression (without regard to other frames) and inter compression (with regard to other frames). Intra compression, inter compression with motion detection, and inter compression with motion estimation are performed on a block by block basis, as needed. Segmentation is provided to compare encoding of a block with encoding of its sub-blocks, and to select the best block size for encoding.
    Type: Application
    Filed: March 31, 2003
    Publication date: November 24, 2005
    Inventors: Albert Wang, Sanjeev Mehrotra