Abstract: A drone security system with at least a drone and a drone base having been setup with locations that are part of a tradition security systems and where the traditional security system is in communication with drone base enabling the drone to respond to events that occur in the traditional security system and for the drone to also follow a predetermined path with checkpoints.

Abstract: A drone security system with at least a drone and a drone base having been setup with locations that are part of a tradition security systems and where the traditional security system is in communication with drone base enabling the drone to respond to events that occur in the traditional security system and for the drone to also follow a predetermined path with checkpoints.

Abstract: A drone security system with at least a drone and a drone base having been setup with locations that are part of a tradition security systems and where the traditional security system is in communication with drone base enabling the drone to respond to events that occur in the traditional security system and for the drone to also follow a predetermined path with checkpoints.

Abstract: A drone security system with at least a drone and a drone base having been setup with locations that are part of a tradition security systems and where the traditional security system is in communication with drone base enabling the drone to respond to events that occur in the traditional security system and for the drone to also follow a predetermined path with checkpoints.

Abstract: Disclosed is a helmet that is aesthetically appealing and that is capable of decelerating impacts from any direction. In a preferred embodiment, the helmet features: a shell with a head cavity that is lined with shock absorbing material, wherein the shell is outfitted with a halo of deceleration plates.

Abstract: Disclosed is a helmet that is aesthetically appealing and that is capable of decelerating impacts from any direction. In a preferred embodiment, the helmet features: a shell with a head cavity that is lined with shock absorbing material, wherein the shell is outfitted with a halo of deceleration plates.

Abstract: A drone security system with at least a drone and a drone base having been setup with locations that are part of a tradition security systems and where the traditional security system is in communication with drone base enabling the drone to respond to events that occur in the traditional security system and for the drone to also follow a predetermined path with checkpoints.

Abstract: A portable tennis playing apparatus allows players to play the game of tennis in various indoor environments. The portable tennis playing apparatus can be assembled and disassembled easily, and provides the opportunity for the players to not only enjoy the game of tennis but also to improve and hone their skills.

Abstract: A portable tennis playing apparatus allows players to play the game of tennis in various indoor environments. The portable tennis playing apparatus can be assembled and disassembled easily, and provides the opportunity for the players to not only enjoy the game of tennis but also to improve and hone their skills.

Abstract: Disclosed is a helmet that is aesthetically appealing and that is capable of decelerating impacts from any direction. In a preferred embodiment, the helmet features: a shell with a head cavity that is lined with shock absorbing material, wherein the shell is outfitted with a halo of deceleration plates.

Abstract: A method of prefetching data in a microprocessor includes identifying a data stream associated with a process and determining a depth associated with the data stream based upon prefetch factors including the number of currently concurrent data streams and data consumption rates associated with the concurrent data streams. Data prefetch requests are allocated with the data stream to reflect the determined depth of the data stream. Allocating data prefetch requests may include allocating prefetch requests for a number of cache lines away from the cache line currently being referenced, wherein the number of cache lines is equal to the determined depth. The method may include, responsive to determining the depth associated with a data stream, configuring prefetch hardware to reflect the determined depth for the identified data stream. Prefetch control bits in an instruction executed by the processor control the prefetch hardware configuration.

Abstract: A fully integrated, secure, portable, automated inventory control and tracking system for facilities storing mission-critical military equipment and supplies includes a terminal, database, and one or more reader/scanners. Software authenticates personnel requesting or returning mission-critical military equipment or supplies based on a machine-readable identifier on each individuals' badge, performs inventory control including check out and check in of the equipment and supplies based on machine-readable identifiers on the equipment, tracks calibration and maintenance requirements for the equipment, generates reports and forms, facilitates inventories, and manages the security of the facility by tracking periodic changes in facility access controls. The entire life cycle of the equipment is managed, including its history, maintenance, calibration, modification, and repair.

Abstract: A method and processor for performing on-demand scratch register reallocation by dynamically adjusting the number of scratch registers from within the pool of rename registers includes initially allocating from a set of physical registers one or more architected registers and a pool of one or more rename registers and allocating from the pool of rename registers an initial number of scratch registers for storing microcode operands. In response to detecting that a fetched instruction requires an additional scratch register beyond the initial number, a selected physical register is reallocated from among the pool of rename registers as the additional scratch register, and a flag is set to indicate the rename register is allocated as the additional scratch register. In response to determining that the additional scratch register is no longer needed, the additional scratch register is deallocated and the flag is reset, such that the selected physical register returns to the pool of rename registers.

Abstract: In a microprocessor having a load/store unit and prefetch hardware, the prefetch hardware includes a prefetch queue containing entries indicative of allocated data streams. A prefetch engine receives an address associated with a store instruction executed by the load/store unit. The prefetch engine determines whether to allocate an entry in the prefetch queue corresponding to the store instruction by comparing entries in the queue to a window of addresses encompassing multiple cache blocks, where the window of addresses is derived from the received address. The prefetch engine compares entries in the prefetch queue to a window of 2M contiguous cache blocks. The prefetch engine suppresses allocation of a new entry when any entry in the prefetch queue is within the address window. The prefetch engine further suppresses allocation of a new entry when the data address of the store instruction is equal to an address in a border area of the address window.

Abstract: A method of prefetching data in a microprocessor includes identifying a data stream associated with a process and determining a depth associated with the data stream based upon prefetch factors including the number of currently concurrent data streams and data consumption rates associated with the concurrent data streams. Data prefetch requests are allocated with the data stream to reflect the determined depth of the data stream. Allocating data prefetch requests may include allocating prefetch requests for a number of cache lines away from the cache line currently being referenced, wherein the number of cache lines is equal to the determined depth. The method may include, responsive to determining the depth associated with a data stream, configuring prefetch hardware to reflect the determined depth for the identified data stream. Prefetch control bits in an instruction executed by the processor control the prefetch hardware configuration.

Abstract: This disclosure describes a method to generate large numbers of spot beams for multiple-beam satellite systems using smaller apertures. This is done by dividing the basic spot beam that has 3 to 4 dB of gain drop within the beam into a number of smaller 1-dB sub-beams. This has the effect of reducing the required peak gain for the antenna by 2-3 dB, thus reducing its size by as much as 50%. The frequency band allocated to the basic beam will be divided among the sub-beams. However, the frequency re-use among the basic beams can be maintained. Frequency allocations have to be coordinated among all beams. This concept is especially applicable to phased arrays using digital beam formers. The DBF complexity is a function of the number of array elements, and is less dependent on the number of beams. Reducing the array size, and consequently reducing the number of elements helps in reducing the complexity, power and mass of the DBF.

Abstract: A weight bearing strut assembly is capable of supporting the human frame in the act of walking and further enables a leg to which it is strapped to bend in a normal manner as the leg is brought forward during each step, and to lock when the leg is straightened as necessary to shift weight thereupon. The strut assembly includes a braking mechanism activated as load is placed upon the strut assembly, and an urging mechanism which is activated when the load is removed, and the strut assembly is bent but moving toward the straight leg attitude. Under these conditions, the urging mechanism drives the strut assembly quickly into a co-linear arrangement so as to assure that the strut assembly is ready to take a compressive load.