Patents by Inventor Alberto Reyes

Alberto Reyes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of generating power vectors for circuit power dissipation simulation having both combinational and sequential logic circuits
    Patent number: 5740407
    Abstract: A method of generating power vectors to calculate power dissipation for a circuit is provided. The circuit includes both combinational logic and sequential logic circuits. The method includes removing all sequential logic circuits from the circuit. Boolean equations that describe the logical operation of the combinational logic of the circuit cells are generated. Power vectors are generated from the Boolean equations corresponding to internal and output transitions which dissipate power in the circuit. Redundant power vectors are then eliminated. The power vectors are then analyzed for "consistent" behavior with the sequential logic circuits. Operation of sequential logic circuits follow an ordered or defined sequence of events. Power vectors that are "inconsistent" with the operation of the sequential logic circuits are eliminated. The remaining power vectors are used to simulate the power dissipation of the circuit.
    Type: Grant
    Filed: July 5, 1995
    Date of Patent: April 14, 1998
    Assignee: Motorola, Inc.
    Inventors: Gary Yeap, Alberto Reyes, Sean Tyler