Patents by Inventor Alessandro Chini
Alessandro Chini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12218231Abstract: An HEMT transistor includes a semiconductor body having a semiconductive heterostructure. A gate region, of conductive material, is arranged above and in contact with the semiconductor body. A first insulating layer extends over the semiconductor body, laterally to the conductive gate region. A second insulating layer extends over the first insulating layer and the gate region. A first field plate region, of conductive material, extends between the first and the second insulating layers, laterally spaced from the conductive gate region along a first direction. A second field plate region, of conductive material, extends over the second insulating layer, and the second field plate region overlies and is vertically aligned with the first field plate region.Type: GrantFiled: December 9, 2020Date of Patent: February 4, 2025Assignee: STMicroelectronics S.r.l.Inventors: Ferdinando Iucolano, Alessandro Chini
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Publication number: 20250040173Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: ApplicationFiled: October 10, 2024Publication date: January 30, 2025Applicant: STMicroelectronics S.r.l.Inventors: Ferdinando IUCOLANO, Alessandro Chini
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Patent number: 12148823Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: GrantFiled: October 31, 2022Date of Patent: November 19, 2024Assignee: STMICROELECTRONICS S.r.l.Inventors: Ferdinando Iucolano, Alessandro Chini
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Publication number: 20240332413Abstract: The HEMT device has a body including a heterostructure configured to generate a 2-dimensional charge-carrier gas; and a gate structure which extends on a top surface of the body and is biasable to electrically control the 2-dimensional charge-carrier gas. The gate structure has a channel modulating region of semiconductor material; a functional region of semiconductor material; and a gate contact region of conductive material. The functional region and the gate contact region extend on a top surface of the channel modulating region and the gate contact region is arranged laterally with respect to the functional region. The channel modulating region has a different conductivity type with respect to the functional region.Type: ApplicationFiled: March 21, 2024Publication date: October 3, 2024Applicant: STMicroelectronics International N.V.Inventors: Ferdinando IUCOLANO, Alessandro CHINI, Maria Eloisa CASTAGNA, Aurore CONSTANT, Cristina TRINGALI
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Publication number: 20240313102Abstract: An integrated power device includes a heterostructure, having a channel layer and a barrier layer, a source contact, a drain contact, and a gate region, arranged on the barrier layer between the source contact and the drain contact. An insulating field structure is arranged on the barrier layer between the gate region and the drain contact. A field plate extends over the insulating field structure. The insulating field structure includes a first dielectric region made of a first dielectric material on the barrier layer and a second dielectric region made of a second dielectric material, selectively etchable with respect to the first dielectric material on the first dielectric region. On a side of the insulating field structure towards the gate region, the field plate is in contact with the first dielectric region.Type: ApplicationFiled: March 5, 2024Publication date: September 19, 2024Applicant: STMicroelectronics International N.V.Inventors: Cristina MICCOLI, Ferdinando IUCOLANO, Cristina TRINGALI, Maria Eloisa CASTAGNA, Alessandro CHINI
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Publication number: 20240178301Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.Type: ApplicationFiled: December 5, 2023Publication date: May 30, 2024Applicant: STMICROELECTRONICS S.r.l.Inventors: Ferdinando IUCOLANO, Alfonso PATTI, Alessandro CHINI
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Patent number: 11862707Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.Type: GrantFiled: August 6, 2021Date of Patent: January 2, 2024Assignee: STMICROELECTRONICS S.R.L.Inventors: Ferdinando Iucolano, Alfonso Patti, Alessandro Chini
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Publication number: 20230282727Abstract: An HEMT device includes a heterostructure, an insulation layer that extends on the heterostructure and has a thickness along a first direction, and a gate region. The gate region has a first portion that extends through the insulation layer, throughout the thickness of the insulation layer, and has a second portion that extends in the heterostructure. The first portion of the gate region has a first width along a second direction transverse to the first direction. The second portion of the gate region has a second width, along the second direction, that is different from the first width.Type: ApplicationFiled: February 24, 2023Publication date: September 7, 2023Applicant: STMICROELECTRONICS S.r.l.Inventors: Ferdinando IUCOLANO, Alessandro CHINI
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Publication number: 20230047815Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: ApplicationFiled: October 31, 2022Publication date: February 16, 2023Applicant: STMICROELECTRONICS S.r.l.Inventors: Ferdinando IUCOLANO, Alessandro CHINI
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Patent number: 11489068Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: GrantFiled: December 8, 2020Date of Patent: November 1, 2022Assignee: STMICROELECTRONICS S.r.l.Inventors: Ferdinando Iucolano, Alessandro Chini
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Publication number: 20210367062Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.Type: ApplicationFiled: August 6, 2021Publication date: November 25, 2021Applicant: STMICROELECTRONICS S.R.L.Inventors: Ferdinando IUCOLANO, Alfonso PATTI, Alessandro CHINI
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Patent number: 11101363Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.Type: GrantFiled: November 20, 2019Date of Patent: August 24, 2021Assignee: STMICROELECTRONICS S.R.L.Inventors: Ferdinando Iucolano, Alfonso Patti, Alessandro Chini
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Publication number: 20210175350Abstract: An HEMT transistor includes a semiconductor body having a semiconductive heterostructure. A gate region, of conductive material, is arranged above and in contact with the semiconductor body. A first insulating layer extends over the semiconductor body, laterally to the conductive gate region. A second insulating layer extends over the first insulating layer and the gate region. A first field plate region, of conductive material, extends between the first and the second insulating layers, laterally spaced from the conductive gate region along a first direction. A second field plate region, of conductive material, extends over the second insulating layer, and the second field plate region overlies and is vertically aligned with the first field plate region.Type: ApplicationFiled: December 9, 2020Publication date: June 10, 2021Inventors: Ferdinando IUCOLANO, Alessandro Chini
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Publication number: 20210091218Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: ApplicationFiled: December 8, 2020Publication date: March 25, 2021Inventors: Ferdinando IUCOLANO, Alessandro CHINI
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Patent number: 10892357Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: GrantFiled: June 4, 2019Date of Patent: January 12, 2021Assignee: STMICROELECTRONICS S.r.l.Inventors: Ferdinando Iucolano, Alessandro Chini
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Publication number: 20200091313Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.Type: ApplicationFiled: November 20, 2019Publication date: March 19, 2020Inventors: Ferdinando IUCOLANO, Alfonso PATTI, Alessandro Chini
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Patent number: 10522646Abstract: A HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.Type: GrantFiled: May 19, 2016Date of Patent: December 31, 2019Assignee: STMICROELECTRONICS S.R.L.Inventors: Ferdinando Iucolano, Alfonso Patti, Alessandro Chini
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Patent number: 10516041Abstract: An HEMT includes a buffer layer, a hole-supply layer on the buffer layer, a heterostructure on the hole-supply layer, and a source electrode. The hole-supply layer is made of P-type doped semiconductor material, the buffer layer is doped with carbon, and the source electrode is in direct electrical contact with the hole-supply layer, such that the hole-supply layer can be biased to facilitate the transport of holes from the hole-supply layer to the buffer layer.Type: GrantFiled: June 8, 2018Date of Patent: December 24, 2019Assignee: STMICROELECTRONICS S.R.L.Inventors: Ferdinando Iucolano, Alessandro Chini
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Publication number: 20190288100Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: ApplicationFiled: June 4, 2019Publication date: September 19, 2019Inventors: Ferdinando IUCOLANO, Alessandro CHINI
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Patent number: 10381470Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: GrantFiled: December 29, 2016Date of Patent: August 13, 2019Assignee: STMICROELECTRONICS S.R.L.Inventors: Ferdinando Iucolano, Alessandro Chini