Patents by Inventor Alessandro Piovaccari
Alessandro Piovaccari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10044383Abstract: A technique that reduces or eliminates trading-off power amplifier efficiency and costly external filtering in amplitude and phase modulated sinusoidal signal generation uses multi-phase outphasing and a multi-phase switching mode power amplifier to generate the amplitude and phase modulated sinusoidal signals. The technique combines multiple clock phases with sinusoidally weighted circuits of the switching mode power amplifier to improve amplitude and phase modulated sinusoidal signal generation.Type: GrantFiled: December 30, 2016Date of Patent: August 7, 2018Assignee: Silicon Laboratories Inc.Inventors: Aaron J. Caffee, Brian G. Drost, Alessandro Piovaccari, Aslamali A. Rafi
-
Publication number: 20180191384Abstract: A technique that reduces or eliminates trading-off power amplifier efficiency and costly external filtering in amplitude and phase modulated sinusoidal signal generation uses multi-phase outphasing and a multi-phase switching mode power amplifier to generate the amplitude and phase modulated sinusoidal signals. The technique combines multiple clock phases with sinusoidally weighted circuits of the switching mode power amplifier to improve amplitude and phase modulated sinusoidal signal generation.Type: ApplicationFiled: December 30, 2016Publication date: July 5, 2018Inventors: Aaron J. Caffee, Brian G. Drost, Alessandro Piovaccari, Aslamali A. Rafi
-
Patent number: 9979404Abstract: A technique that reduces or eliminates trading-off power amplifier efficiency and costly external filtering in amplitude and phase modulated sinusoidal signal generation uses multi-phase outphasing and a multi-phase switching mode power amplifier to generate the amplitude and phase modulated sinusoidal signals. The technique combines multiple clock phases with sinusoidally weighted circuits of the switching mode power amplifier to improve amplitude and phase modulated sinusoidal signal generation.Type: GrantFiled: December 30, 2016Date of Patent: May 22, 2018Assignee: Silicon Laboratories Inc.Inventors: Brian G. Drost, Aaron J. Caffee, Alessandro Piovaccari, Aslamali A. Rafi
-
Patent number: 9800281Abstract: A signal processor for a radio frequency (RF) receiver includes a signal processing path having first and second programmable gain amplifiers and first and second offset correction circuits. The first offset correction circuit receives a first digital offset correction word and corrects a first offset of the first programmable gain amplifier by adding a first value corresponding to the first digital offset correction word to an input of the first programmable gain amplifier. The second offset correction circuit receives a second digital offset correction word and corrects a second offset of the second programmable gain amplifier by adding a first value corresponding to the second digital offset correction word to an input of the second programmable gain amplifier. A controller measures offsets of the first and second programmable gain amplifiers during a calibration, and provides the first and second offset correction words in response to the offsets.Type: GrantFiled: March 28, 2017Date of Patent: October 24, 2017Assignee: Silicon Laboratories Inc.Inventors: Abdulkerim L. Coban, Alessandro Piovaccari, Ramin K. Poorfard, James T. Kao
-
Publication number: 20170201282Abstract: A signal processor for a radio frequency (RF) receiver includes a signal processing path having first and second programmable gain amplifiers and first and second offset correction circuits. The first offset correction circuit receives a first digital offset correction word and corrects a first offset of the first programmable gain amplifier by adding a first value corresponding to the first digital offset correction word to an input of the first programmable gain amplifier. The second offset correction circuit receives a second digital offset correction word and corrects a second offset of the second programmable gain amplifier by adding a first value corresponding to the second digital offset correction word to an input of the second programmable gain amplifier. A controller measures offsets of the first and second programmable gain amplifiers during a calibration, and provides the first and second offset correction words in response to the offsets.Type: ApplicationFiled: March 28, 2017Publication date: July 13, 2017Applicant: Silicon Laboratories Inc.Inventors: Abdulkerim L. Coban, Alessandro Piovaccari, Ramin K. Poorfard, James T. Kao
-
Patent number: 9647623Abstract: A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.Type: GrantFiled: September 30, 2009Date of Patent: May 9, 2017Assignee: Silicon Laboratories Inc.Inventors: Abdulkerim L. Coban, Alessandro Piovaccari, Ramin Khoini-Poorfard, James T. Kao
-
Patent number: 9491394Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.Type: GrantFiled: April 16, 2014Date of Patent: November 8, 2016Assignee: Silicon Laboratories Inc.Inventors: András Vince Horvath, Abdulkerim L. Coban, Pio Balmelli, Ramin Khoini-Poorfard, Alessandro Piovaccari
-
Patent number: 9219512Abstract: In one form, an integrated receiver includes a tracking bandpass filter, a tunable lowpass filter, and a mixer formed on a single integrated circuit chip. The tracking bandpass filter has an input for receiving a radio frequency (RF) input signal, and an output, and comprises a variable capacitor having a capacitance that varies in response to a bandpass frequency control signal, in parallel with an integrated inductor. The integrated inductor comprises a plurality of windings formed in a plurality of metal layers. The tunable lowpass filter has an input coupled to the output of the tracking bandpass filter, and an output and having a tuning input for receiving a cutoff frequency signal. The mixer has a signal input coupled to the output of the tunable lowpass filter, a local oscillator input for receiving a local oscillator signal, and a signal output for providing a converted RF signal.Type: GrantFiled: February 3, 2015Date of Patent: December 22, 2015Assignee: SILICON LABORATORIES INC.Inventors: Ramin Khoini-Poorfard, Alessandro Piovaccari, Aslamali A. Rafi, Mustafa H. Koroglu, David S. Trager, Abdulkerim L. Coban
-
Publication number: 20150147992Abstract: In one form, an integrated receiver includes a tracking bandpass filter, a tunable lowpass filter, and a mixer formed on a single integrated circuit chip. The tracking bandpass filter has an input for receiving a radio frequency (RF) input signal, and an output, and comprises a variable capacitor having a capacitance that varies in response to a bandpass frequency control signal, in parallel with an integrated inductor. The integrated inductor comprises a plurality of windings formed in a plurality of metal layers. The tunable lowpass filter has an input coupled to the output of the tracking bandpass filter, and an output and having a tuning input for receiving a cutoff frequency signal. The mixer has a signal input coupled to the output of the tunable lowpass filter, a local oscillator input for receiving a local oscillator signal, and a signal output for providing a converted RF signal.Type: ApplicationFiled: February 3, 2015Publication date: May 28, 2015Applicant: SILICON LABORATORIES INC.Inventors: Ramin Khoini-Poorfard, Alessandro Piovaccari, Aslamali A. Rafi, Mustafa H. Koroglu, David S. Trager, Abdulkerim L. Coban
-
Patent number: 9036091Abstract: An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.Type: GrantFiled: January 6, 2011Date of Patent: May 19, 2015Assignee: Silicon Laboratories Inc.Inventors: Alan F. Hendrickson, Alessandro Piovaccari, Ramin Khoini-Poorfard, Mitchell Reid, Frederick Alan Rush, Jean-Marc Guyot, David Le Goff, Michael Robert May, Henry William Singor, Qi Cai, Peter Jozef Vancorenland, Chunyu Xin, Pascal Blouin
-
Patent number: 8983419Abstract: An integrated receiver includes a first signal processing path, a second signal processing path, and a controller. The first signal processing path has an input and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor formed with windings in a first number of metal layers of the integrated receiver. The second signal processing path has an input and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor formed with windings in a second number of metal layers of the integrated receiver. The second number of windings is lower than the first number. The controller enables one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal.Type: GrantFiled: March 3, 2014Date of Patent: March 17, 2015Assignee: Silicon Laboratories Inc.Inventors: Ramin Khoini-Poorfard, Alessandro Piovaccari, Aslamali A. Rafi, Mustafa H. Koroglu, David S. Trager, Abdulkerim L. Coban
-
Patent number: 8880018Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.Type: GrantFiled: August 27, 2013Date of Patent: November 4, 2014Assignee: Silicon Laboratories IncInventors: Aslamali A. Rafi, Alessandro Piovaccari
-
Patent number: 8874060Abstract: A radio frequency (RF) receiver with frequency planning includes an analog receiver, a digital processor, and a clock synthesizer. The analog receiver has an input for receiving an RF input signal, and an output for providing a digital intermediate frequency (IF) signal. The digital processor has a first input for receiving the digital IF signal, a second input for receiving a clock signal, a signal output for providing an IF output signal, and a control output for providing a clock control signal. The clock synthesizer has an input for receiving the clock control signal, and an output for providing the clock signal, and is controllable to adjust a frequency of the clock signal to a selected one of a predetermined number of frequencies within a predetermined frequency range in response to the clock control signal.Type: GrantFiled: December 18, 2009Date of Patent: October 28, 2014Assignee: Silicon Laboratories Inc.Inventors: Sherry X. Wu, Mustafa H. Koroglu, Alessandro Piovaccari, Ramin K. Poorfard
-
Patent number: 8848110Abstract: A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.Type: GrantFiled: May 28, 2010Date of Patent: September 30, 2014Assignee: Silicon Laboratories Inc.Inventors: Ramin Khoini-Poorfard, Alan F. Hendrickson, Alessandro Piovaccari, David S. Trager, Aslamali A. Rafi, Abdulkerim L. Coban, David Le Goff
-
Publication number: 20140226074Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.Type: ApplicationFiled: April 16, 2014Publication date: August 14, 2014Applicant: SILICON LABORATORIES INC.Inventors: András Vince Horvath, Abdulkerim L. Coban, Pio Balmelli, Ramin Khoini-Poorfard, Alessandro Piovaccari
-
Patent number: 8781428Abstract: A frequency synthesizer includes a controlled oscillator configured to extend a temperature range and phase noise of the synthesizer without compromising the frequency coverage of the synthesizer. The frequency synthesizer also includes bias generation circuitry that sets a bias current of a charge pump to reduce bandwidth variations of the synthesizer. The frequency synthesizer further includes switching circuitry to dynamically turn a charge pump on and off to reduce effects of current leakage in the charge pump.Type: GrantFiled: March 2, 2010Date of Patent: July 15, 2014Assignee: Silicon Laboratories Inc.Inventors: Mustafa H. Koroglu, Sherry X. Wu, Ramin Khoini-Poorfard, Alessandro Piovaccari
-
Patent number: 8774750Abstract: In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.Type: GrantFiled: June 28, 2013Date of Patent: July 8, 2014Assignee: Silicon Laboratories Inc.Inventors: Aslamali A. Rafi, Alessandro Piovaccari
-
Patent number: 8768281Abstract: In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.Type: GrantFiled: September 6, 2013Date of Patent: July 1, 2014Assignee: Silicon Laboratories Inc.Inventors: Aslamali A. Rafi, Alessandro Piovaccari
-
Publication number: 20140176806Abstract: An integrated receiver includes a first signal processing path, a second signal processing path, and a controller. The first signal processing path has an input and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor formed with windings in a first number of metal layers of the integrated receiver. The second signal processing path has an input and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor formed with windings in a second number of metal layers of the integrated receiver. The second number of windings is lower than the first number. The controller enables one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal.Type: ApplicationFiled: March 3, 2014Publication date: June 26, 2014Applicant: SILICON LABORATORIES INC.Inventors: Ramin Khoini-Poorfard, Alessandro Piovaccari, Aslamali A. Rafi, Mustafa H. Koroglu, David S. Trager, Abdulkerim L. Coban
-
Patent number: 8749417Abstract: A method of configuring an analog-to-digital converter (ADC) includes configuring the ADC to operate in one of a low-pass filter mode and a band-pass filter mode according to a value of a control signal. In at least one embodiment, the method further includes configuring an integrator gain of the ADC and a feed-forward gain of the ADC based on selection of one of a low-intermediate frequency (LIF) mode and a zero-intermediate frequency (ZIF) mode.Type: GrantFiled: January 5, 2012Date of Patent: June 10, 2014Assignee: Silicon Laboratories, Inc.Inventors: Abdulkerim L. Coban, Clayton H. Daigle, Alessandro Piovaccari