Patents by Inventor Alessandro Venca

Alessandro Venca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040143800
    Abstract: A method and system are disclosed for generating descriptions of circuits representative of the behavior of dynamic systems. A state space model representing a dynamic system may be used to generate an electronic circuit equivalent having operating characteristics equivalent to the operating characteristics of the dynamic system. The electronic circuit equivalent may be then described as a SPICE circuit description which is simulated to determine the time and frequency domain characteristics of the dynamic system.
    Type: Application
    Filed: January 22, 2003
    Publication date: July 22, 2004
    Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca
  • Publication number: 20040141248
    Abstract: An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.
    Type: Application
    Filed: January 22, 2003
    Publication date: July 22, 2004
    Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca
  • Publication number: 20010050586
    Abstract: The invention relates to a low supply voltage analog multiplier which comprises a pair of differential cells, each cell comprising a pair of bipolar transistors with coupled emitters. A first transistor of each cell receives an input signal on its base terminal and has its collector terminal coupled to a first voltage reference through a bias member. Advantageously, the second transistor of each cell is a diode configuration, and the cells are interconnected at a common node corresponding to the base terminals of the second transistors in each pair. This multiplier can be supplied very low voltages and still exhibit a high rate of operation along with reduced harmonic distortion of the output signal, even with input signals of peak-to-peak amplitude above 600 mV.
    Type: Application
    Filed: February 27, 2001
    Publication date: December 13, 2001
    Inventors: Valerio Pisati, Marco Cazzaniga, Alessandro Venca