Patents by Inventor Alex Frolikov

Alex Frolikov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10678703
    Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: allocate a named portion of the non-volatile storage device; generate, according to a first block size, first block-wise mapping data; translate, using the first block-wise mapping data, logical addresses defined in the named portion to logical addresses defined for the entire non-volatile storage media, which can then be further translated to physical addresses in a same way for all named portions; determine a second block size; generate, according to the second block size, second block-wise mapping data; translate, using the second block-wise mapping data, the logical addresses defined in the name portion to the logical addresses defined for the entire non-volatile storage media.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: June 9, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Alex Frolikov
  • Patent number: 10642488
    Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: store a namespace map mapping blocks of logical block addresses in a namespace to blocks from a logical address capacity of the non-volatile storage media; adjust the namespace map to change the size of the namespace; and translate logical addresses in the namespace to physical addresses for the non-volatile storage media using the namespace map.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: May 5, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Alex Frolikov
  • Patent number: 10635345
    Abstract: A memory system having memory components and a processing device to: communicate with a host system to obtain, from the host system, at least one host specified parameter during booting up of the host system; execute first firmware to process requests from the host system using the at least one host specified parameter, the requests including storing data into the memory components and retrieving data from the memory components; install second firmware while running the first firmware; store the at least one host specified parameter; and reboot into executing the second firmware using the at least one host specified parameter, without rebooting of the host system.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 28, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Alex Frolikov
  • Publication number: 20200073580
    Abstract: A memory system having memory components and a processing device to: communicate with a host system to obtain, from the host system, at least one host specified parameter during booting up of the host system; execute first firmware to process requests from the host system using the at least one host specified parameter, the requests including storing data into the memory components and retrieving data from the memory components; install second firmware while running the first firmware; store the at least one host specified parameter; and reboot into executing the second firmware using the at least one host specified parameter, without rebooting of the host system.
    Type: Application
    Filed: August 31, 2018
    Publication date: March 5, 2020
    Inventor: Alex Frolikov
  • Publication number: 20200026447
    Abstract: A computer system having a host coupled to a storage device via a peripheral component interconnect express bus. The host communicates with the storage device in accordance with a non-volatile memory host controller interface specification. The storage device stores versions of meta data sequentially in a portion of a volatile memory that is protected against power failure using a power hold-up module. In response to a sudden power loss, the power hold-up module provides sufficient energy to support operations to copy the content from the portion of the volatile memory into a non-volatile memory. During a startup process, the content is retrieved from the non-volatile memory; and a binary search is performed to locate, within the content, the latest, valid version of the meta data to continue operations interrupted by the power loss.
    Type: Application
    Filed: September 27, 2019
    Publication date: January 23, 2020
    Inventor: Alex Frolikov
  • Patent number: 10509599
    Abstract: A memory system having a stack memory, a set of media. and a controller. The controller divides the stack memory into a plurality of stacks, measures usages of the stacks in a period of time of operating on the set of media, and adjusts partitioning of the stack memory into the plurality of stacks according to the measured usages.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 17, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Alex Frolikov
  • Patent number: 10503404
    Abstract: A computer storage device having: a host interface; a controller; non-volatile storage media; and firmware. The firmware instructs the controller to: divide a contiguous logical address capacity into blocks according to a predetermined block size; and maintain a data structure to identify: free blocks are available for allocation to new namespaces; and blocks that have been allocated to namespaces in use. Based on the content of the data structure, non-contiguous blocks can be allocated to a namespace; and logical addresses in the namespace can be translated to physical addresses for addressing the non-volatile storage media of the storage device.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: December 10, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Alex Frolikov
  • Publication number: 20190370097
    Abstract: A memory system having a set of media, a plurality of inter-process communication channels, and a controller configured to run a plurality of processes that communicate with each other using inter-process communication messages transmitted via the plurality of inter-process communication channels, in response to requests from a host system to store data in the media or retrieve data from the media. The memory system has a message manager that examines requests from the host system, identifies a plurality of combinable requests, generates a combined request, and provides the combined request to the plurality of processes as a substitute of the plurality of combinable requests.
    Type: Application
    Filed: August 8, 2019
    Publication date: December 5, 2019
    Inventor: Alex Frolikov
  • Patent number: 10496457
    Abstract: A memory system having a set of media, a plurality of inter-process communication channels, and a controller configured to run a plurality of processes that communicate with each other using inter-process communication messages transmitted via the plurality of inter-process communication channels, in response to requests from a host system to store data in the media or retrieve data from the media. The memory system has a message manager that examines requests from the host system, identifies a plurality of combinable requests, generates a combined request, and provides the combined request to the plurality of processes as a substitute of the plurality of combinable requests.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: December 3, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Alex Frolikov
  • Publication number: 20190361630
    Abstract: A computer system having a host coupled to a storage device via a peripheral component interconnect express bus. The host communicates write commands of low priority to the storage device, which places them in a queue for execution at an idle time. In response to a determination that the storage device is in an idle state, the storage device best accommodates the write commands in the idle queue in connection with housekeeping tasks, such as garbage collection and wear leveling, to best reduce write amplification.
    Type: Application
    Filed: August 8, 2019
    Publication date: November 28, 2019
    Inventor: Alex Frolikov
  • Publication number: 20190361610
    Abstract: A computer storage device having: a host interface; a controller; non-volatile storage media; and firmware. The firmware instructs the controller to: divide a contiguous logical address capacity into blocks according to a predetermined block size; and maintain a data structure to identify: free blocks are available for allocation to new namespaces; and blocks that have been allocated to namespaces in use. Based on the content of the data structure, non-contiguous blocks can be allocated to a namespace; and logical addresses in the namespace can be translated to physical addresses for addressing the non-volatile storage media of the storage device.
    Type: Application
    Filed: August 8, 2019
    Publication date: November 28, 2019
    Inventor: Alex Frolikov
  • Publication number: 20190361629
    Abstract: A memory system having a stack memory, a set of media. and a controller. The controller divides the stack memory into a plurality of stacks, measures usages of the stacks in a period of time of operating on the set of media, and adjusts partitioning of the stack memory into the plurality of stacks according to the measured usages.
    Type: Application
    Filed: August 8, 2019
    Publication date: November 28, 2019
    Inventor: Alex Frolikov
  • Patent number: 10489085
    Abstract: A computer system having a host coupled to a storage device via a peripheral component interconnect express bus. The host communicates write commands of low priority to the storage device, which places them in a queue for execution at an idle time. In response to a determination that the storage device is in an idle state, the storage device best accommodates the write commands in the idle queue in connection with housekeeping tasks, such as garbage collection and wear leveling, to best reduce write amplification.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: November 26, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Alex Frolikov
  • Patent number: 10481818
    Abstract: A computer system having a host coupled to a storage device via a peripheral component interconnect express bus. The host communicates with the storage device in accordance with a non-volatile memory host controller interface specification. The storage device stores versions of meta data sequentially in a portion of a volatile memory that is protected against power failure using a power hold-up module. In response to a sudden power loss, the power hold-up module provides sufficient energy to support operations to copy the content from the portion of the volatile memory into a non-volatile memory. During a startup process, the content is retrieved from the non-volatile memory; and a binary search is performed to locate, within the content, the latest, valid version of the meta data to continue operations interrupted by the power loss.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: November 19, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Alex Frolikov
  • Publication number: 20190347010
    Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: receive, via the host interface, a request from a host to allocate a namespace of a quantity of non-volatile memory; generate, in response to the request, a namespace map identifying a plurality of blocks of addresses having a same predetermined block size, and a partial block of addresses having a size smaller than the predetermined block size; and convert, using the namespace map, logical addresses in the namespace communicated from the host to physical addresses for the quantity of the non-volatile memory. For example, the request for allocating the namespace can be in accordance with an NVMe protocol.
    Type: Application
    Filed: July 23, 2019
    Publication date: November 14, 2019
    Inventor: Alex Frolikov
  • Publication number: 20190318798
    Abstract: A memory system having non-volatile media and a controller configured to process requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media. The non-volatile media has a set of memory units. The memory system stores an indicator indicating whether the memory system is operating in a user mode or a manufacturing mode. A defect manager of the memory system identifies a threshold based on the indicator, monitors an error rate in reading data from the non-volatile media and, in response to the error rate reaching the threshold, screens the non-volatile media for defective memory units.
    Type: Application
    Filed: April 12, 2018
    Publication date: October 17, 2019
    Inventor: Alex Frolikov
  • Publication number: 20190317894
    Abstract: A memory system having non-volatile media, a volatile memory, and a controller configured to process requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media. The non-volatile media has a quantity of memory units and stores an address map that defines logical addresses used in the requests in terms of physical addresses of the memory units in the non-volatile media. The host system has a memory connected to the memory system via a communication channel. The memory system has a cache manager that stores a first portion of the address map in the volatile memory of the memory system and a second portion of the address map in the memory of the host system. In response to an operation that uses a logical address defined in the second portion, the cache manager retrieves the second portion of the address map from the memory of the host system through the communication channel to the volatile memory of the memory system.
    Type: Application
    Filed: April 12, 2018
    Publication date: October 17, 2019
    Inventor: Alex Frolikov
  • Publication number: 20190310918
    Abstract: A memory system having a set of non-volatile media, a volatile memory, a buffer memory, and a controller configured to process requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media. The buffer memory is capable of holding data for at least a predetermined period of time after the volatile memory loses data during an event of power outage in the memory system. A power manager monitors a power supply of the memory system to detect an onset of power outage and, in response to the onset of power outage, causes the controller to copy meta data in the volatile memory to the buffer memory.
    Type: Application
    Filed: April 6, 2018
    Publication date: October 10, 2019
    Inventor: Alex Frolikov
  • Publication number: 20190310892
    Abstract: A memory system having a set of media, a set of resources, and a controller configured via firmware to use the set of resources in processing requests from a host system to store data in the media or retrieve data from the media. The memory system has a workload manager that analyzes activity records in an execution log for a time period where each of the activity records can indicate whether a processor of the controller is in an idle state during a time slot in the time period. The workload manager identifies idle time slots within the time period during which time slots one or more lightly-loaded processors in the plurality of processors are in the idle state, and adjusts a configuration of the controller to direct tasks from one or more heavily-loaded processors to the one or more lightly-loaded processors.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 10, 2019
    Inventor: Alex Frolikov
  • Patent number: 10437476
    Abstract: A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: receive, via the host interface, a request from a host to allocate a namespace of a quantity of non-volatile memory; generate, in response to the request, a namespace map identifying a plurality of blocks of addresses having a same predetermined block size, and a partial block of addresses having a size smaller than the predetermined block size; and convert, using the namespace map, logical addresses in the namespace communicated from the host to physical addresses for the quantity of the non-volatile memory. For example, the request for allocating the namespace can be in accordance with an NVMe protocol.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: October 8, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Alex Frolikov