Abstract: A method for passivating diamond films to substantially prevent them from oxidizing at temperatures up to 800.degree. C. in an oxygen atmosphere. The method involves depositing one or more passivating layers over the diamond film wherein one of the layers is nitride and the other layer is quartz. The passivation technique is directly applicable to diamond sensor pressure transducers and enable them to operate at temperatures above 800.degree. C. in oxygen environments. The passivation technique also provides an economical and simple method for patterning diamond films.

Abstract: A method of fabricating a high pressure piezoresistive pressure transducer having a substantially linear pressure versus stress output over its full range of operation. The method involves bonding a carrier wafer having a dielectric isolating layer on one surface and a supporting member on the opposite surface, to a pattern wafer containing at least two single crystalline longitudinal piezoresistive sensing elements of a second conductivity. Both the pattern wafer and sections of the carrier wafer are etched leaving the piezoresistive sensing elements bonded directly to the dielectric isolating layer, and a diaphragm member having a deflecting portion and a non-deflecting portion. The diaphragm member is constructed to have an aspect ratio which is of the order of magnitude of one.

Abstract: A method for fabricating a single crystal silicon on insulator material by forming oxidized layers underneath epi islands without damaging the surface quality of the silicon. In an illustrative embodiment, an epitaxial layer of p-type silicon is grown on a substrate of n-type silicon. A plurality of islands are defined from the epitaxial layer. A semiconductor device is fabricated from one of the p-islands by electrochemically anodizing a region of the substrate beneath that p-island, which p-island can be used to fabricate a selected semiconductor device. If n-type material is required for device fabrication, a device layer of n-type silicon can be grown on the surface of a p-islands and that p-island can be anodized and oxidized to form the insulating layer between the device layer and substrate. In this manner, MOS transistors and other devices may be fabricated for operation at temperatures of up to 500.degree. C.

Abstract: Piezo-optical pressure sensitive devices employing porous semiconductor material as a stress sensitive member. The devices monitor pressure or force applied thereto by detecting a corresponding change in the amount of light absorbed by a porous layer of semiconductive material such as silicon. A pressure or stress signal is thus converted into an optical one. The sensing element of an optical switch embodiment of the device is comprised of a transparent layer of material upon which there is disposed a porous layer of semiconductive material. When unstressed, the porous layer absorbs monochromatic light of a predetermined wavelength. When the porous layer is stressed, a metallized epitaxial layer formed thereon reflects the light back through the transparent layer where it can be detected by a light detection system.

Abstract: A pressure transducer comprising at least one diaphragm formed in a wafer of semiconducting material, the at least one diaphragm being spaced from a first surface of the wafer, a first layer of semiconducting material disposed over the at least one diaphragm, the first layer forming at least one resonating beam over the at least one diaphragm, and a plurality of resistor elements formed from a third layer of semiconducting material disposed over the at least one resonating beam, and isolation means for dielectrically isolating the at least one resonating beam from the at least one diaphragm.

Abstract: An electromechanical transducer is provided, and the process for making it utilizes a piezoresistive element or gage which is dielectrically isolated from a gap spanning member and substrate upon which it is supported. The gage of the invention is a force gage and is derived from a sacrificial wafer by a series of etching and bonding steps which ultimately provide a gage with substantially reduced strain energy requirements.

Abstract: A pressure transducer comprising at least one diaphragm formed in a wafer of semiconducting material, the at least one diaphragm being spaced from a first surface of the wafer, a first layer of semiconducting material disposed over the at least one diaphragm, the first layer forming at least one resonating beam over the at least one diaphragm, and a plurality of resistor elements formed from a third layer of semiconducting material disposed over the at least one resonating beam, and isolation means for dielectrically isolating the at least one resonating beam from the at least one diaphragm.

Abstract: A first semiconductor wafer having a semiconductor element such as a piezoresistive element or any integrated circuit located on a top surface thereof is bonded to a second semiconductor wafer so that the semiconductor element on the first wafer is received in a cavity sealed from the outside environment. The bottom surface of the second wafer is prepared by etching it about a mask pattern so that the pattern projects from the bottom surface, thereby forming the cavity and defining projecting surfaces which are bonded to corresponding projecting areas on the first wafer to create a hermetic seal therebetween. The second wafer is electrochemically etched to produce porous silicon with regions of non-porous monocrystalline silicon extending between the top and bottom surfaces. The porous areas are thermally oxidized to convert them to silicon dioxide while the non-porous regions bonded to bond pads of the resistive pattern on the first wafer act as extended contacts.

Abstract: A plurality of individual device layers having conductive regions extending therethrough are bonded together before or after one or more circuit elements have been fabricated on each one. Groups of device layers are formed by electrochemically anodizing a wafer of semiconductor material. The wafer is rendered totally porous except for a series of non-porous regions extending therethrough. The wafer is then oxidized and densified to result in a wafer having a plurality of electrically isolated extended contacts. A plurality of wafers are processed in this manner. A variety of integrated circuit devices are then formed on the surface of each wafer. The ability to separately fabricate each wafer obviates trying to incorporate various incompatible processes (required by each device type) on just one wafer surface. Once the processing of all individual wafers is completed, each wafer is bonded to another at appropriate areas, with the extending contact aligned to electrically interconnect each device layer.

Abstract: An electromechanical transducer is provided, and the process for making it utilizes a piezoresistive element or gage which is dielectrically isolated from a gap spanning member and substrate upon which it is supported. The gage of the invention is a force gage and is derived from a sacrificial wafer by a series of etching and bonding steps which ultimately provide a gage with substantially reduced strain energy requirements.

Abstract: A process wherein plurality of individual device layers having semiconductor material conductive regions extending therethrough are bonded together before or after one or more circuit elements have been fabricated on each layer. Groups of device layers are formed by electrochemically anodizing a wafer of semiconductor material. The wafer is rendered totally porous except for a series of non-porous regions extending therethrough. The wafer is then oxidized and densifted to result in a wafer having a plurality of electrically isolated extended contacts. A plurality of wafers are processed in this manner. A variety of integrated circuit devices are then formed on the surface of each wafer. Once the processing of all individual wafers is completed, each wafer is bonded to another, with the extending contact aligned to electrically interconnect each device layer. The wafers are then diced to provide a plurality of multi-level integrated circuit structures.

Abstract: Piezo-optical pressure sensitive devices employing porous semiconductor material as a stress sensitive member. The devices monitor pressure or force applied thereto by detecting a corresponding change in the amount of light absorbed by a porous layer of semiconductive material such as silicon. A pressure or stress signal is thus converted into an optical one. The sensing element of an optical switch embodiment of the device is comprised of a transparent layer of material upon which there is disposed a porous layer of semiconductive material. When unstressed, the porous layer absorbs monochromatic light of a predetermined wavelength. When the porous layer is stressed, a metallized epitaxial layer formed thereon reflects the light back through the transparent layer where it can be detected by a light detection system.

Abstract: A first semiconductor wafer having a semiconductor element such as a piezoresistive element or any integrated circuit located on a top surface thereof is bonded to a second semiconductor wafer so that the semiconductor element on the first wafer is received in a cavity sealed from the outside environment. The bottom surface of the second water is prepared by etching it about a mask pattern so that the pattern projects from the bottom surface, thereby forming the cavity and defining projecting surfaces which are bonded to corresponding projecting areas on the first wafer to create a hermetic seal therebetween. The second wafer is electrochemically etched to produce porous silicon with regions of non-porous monocrystalline silicon extending between the top and bottom surfaces. The porous areas are thermally oxidized to convert them to silicon dioxide while the non-porous regions bonded to bond pads of the resistive pattern on the first wafer act as extended contacts.

Abstract: A field effect transistor device constructed in accordance with the present invention includes a channel of semiconductive material such as silicon having at least one row of pores extending therethrough. Internal pn junctions are fabricated within the porous region, such that the inside of each pore is coated with a layer of opposite conductivity type semiconductive material. When voltage is applied to the internal pn-junctions, the space charge around the pores widens or contracts, depending upon the direction of the bias, thereby permitting the modulation of current flow through the channel.

Abstract: A method of bonding a first silicon wafer to a second silicon wafer comprises the steps of diffusing a high conductivity pattern into a surface of a first semiconductor wafer, etching a portion of the surface to raise at least a portion of the pattern, providing a second semiconductor wafer having an insulating layer of a silicon compound disposed thereon, contacting the surface of the pattern to the insulating layer, and bonding the first and second semiconductor wafers at an elevated temperature.