Abstract: An image sensor includes a plurality of pixels and a row driver. Each pixel includes a photodiode, a first transfer gate, a second transfer gate, a first storage node, and a second storage node. The row driver is configured to provide signals to the first transfer gate and the second transfer gate of each pixel such that charge is transferred from the photodiode to the first storage node through the first transfer gate while a signal representing charge stored at the second storage node is output from the pixel to a column readout line. The row driver is also configured to provide signals to the first transfer gate and the second transfer gate such that charge is transferred from the photodiode to the second storage node through the second transfer gate while a signal representing charge stored at the first storage node is output from the pixel.

Abstract: An image sensor of various embodiments includes a pixel array. The pixel array includes a pixel having a photodiode and a transfer gate. The pixel array in various embodiments further includes an antiblooming channel extending from the photodiode to either (i) a pixel output area, or (ii) a drain of a source follower transistor. A method of some embodiments includes (i) driving from a first row driver one or more control signals over one or more control lines to one or more pixels, and (ii) driving from a second row driver the one or more control signals over the one or more control lines to the one or more pixels.

Abstract: An A/D converter suitable for use in a system in which the signal power of noise increases with the signal power of the signal, such as an imaging system, utilizes a variable quantization system for converting analog signals into digital signals. The variable quantization is controlled so that low signal levels the quantization is similar or identical to conventional A/D converters, while the quantization level is increased at higher signal levels. Thus, higher resolution is provided at low signal levels while lower resolution is produced at high signal levels.

Abstract: An A/D converter suitable for use in a system in which the signal power of noise increases with the signal power of the signal, such as an imaging system, utilizes a variable quantization system for converting analog signals into digital signals. The variable quantization is controlled so that at low signal levels the quantization is similar or identical to conventional A/D converters, while the quantization level is increased at higher signal levels. Thus, higher resolution is provided at low signal levels while lower resolution is produced at high signal levels.

Abstract: A high dynamic range imager operates pixels utilizing at least a short integration period and a long integration period. The pixel reading circuits of the imager are adapted to process pixel signals corresponding to the integration periods in parallel. The pixel signals are converted into digital values in parallel. The digital values are each linear functions of the incident light and therefore suitable for use with conventional color processing algorithms. A pipelined rolling shutter operation may be employed where the short integration period of one row of pixels is performed simultaneously with the long integration period of another row of pixels.

Abstract: An image sensor includes a pixel array with a plurality of pixels. A pixel includes a photodiode, a first transfer gate, a storage gate, and a second transfer gate. The first transfer gate is controllable to transfer charge from the photodiode to under the storage gate. The storage gate is connected to a readout circuit to allow the readout circuit to read out a voltage level of a potential at the storage gate. The second transfer gate is controllable to transfer charge from under the storage gate. A method includes controlling the first transfer gate to transfer charge from the photodiode to under the storage gate, reading out a voltage level of a potential at the storage gate using the readout circuit that is connected to the storage gate, and controlling the second transfer gate to drain charge from under the storage gate.

Abstract: An image sensor circuit includes a pixel array, a plurality of column analog-to-digital conversion (ADC) circuits, and at least two memory blocks. Each column ADC circuit is connected to receive analog pixel signals provided from corresponding pixel circuits of the pixel array, and is configured to convert the received analog pixel signals into digital pixel signals. Each memory block is connected to receive digital pixel signals provided from corresponding column ADC circuits of the plurality of column ADC circuits. At least two of the at least two memory blocks are connected to receive digital pixel signals that are provided from corresponding column ADC circuits that are located to a same side of the pixel array. Each memory block of the at least two memory blocks includes a plurality of memory cells, one or more sense amplifiers connected to the memory cells by a readout bus, and a memory controller.

Abstract: Dual ramp analog-to-digital converters and methods allow for performing analog-to-digital conversion of an analog signal. Various dual ramp analog-to-digital converters and methods allow for applying the analog signal and a coarse ramp to a same input of a comparator, and applying a fine ramp to another input of the comparator. Some dual ramp analog-to-digital converters and methods allow for applying the analog signal, a coarse ramp, and a fine ramp to a same input of a comparator. Various dual ramp analog-to-digital converters and methods allow for applying the analog signal to an input of a first comparator, applying a coarse ramp to the input of the first comparator through a coarse ramp switch, applying the analog signal to an input of a second comparator, and applying a fine ramp to another input of the second comparator.

Abstract: An image sensor circuit includes a pixel array, a plurality of column analog-to-digital conversion (ADC) circuits, and at least two memory blocks. Each column ADC circuit is connected to receive analog pixel signals provided from corresponding pixel circuits of the pixel array, and is configured to convert the received analog pixel signals into digital pixel signals. Each memory block is connected to receive digital pixel signals provided from corresponding column ADC circuits of the plurality of column ADC circuits. At least two of the at least two memory blocks are connected to receive digital pixel signals that are provided from corresponding column ADC circuits that are located to a same side of the pixel array. Each memory block of the at least two memory blocks includes a plurality of memory cells, one or more sense amplifiers connected to the memory cells by a readout bus, and a memory controller.

Abstract: Imaging sensors having dual-port for digital readout to pipeline readout processes of two different groups of pixels.

Abstract: An image sensor circuit includes a pixel array, a plurality of column analog-to-digital conversion (ADC) circuits, and at least two memory blocks. Each column ADC circuit is connected to receive analog pixel signals provided from corresponding pixel circuits of the pixel array, and is configured to convert the received analog pixel signals into digital pixel signals. Each memory block is connected to receive digital pixel signals provided from corresponding column ADC circuits of the plurality of column ADC circuits. At least two of the at least two memory blocks are connected to receive digital pixel signals that are provided from corresponding column ADC circuits that are located to a same side of the pixel array. Each memory block of the at least two memory blocks includes a plurality of memory cells, one or more sense amplifiers connected to the memory cells by a readout bus, and a memory controller.

Abstract: Dual ramp analog-to-digital converters and methods allow for performing analog-to-digital conversion of an analog signal. Various dual ramp analog-to-digital converters and methods allow for applying the analog signal and a coarse ramp to a same input of a comparator, and applying a fine ramp to another input of the comparator. Some dual ramp analog-to-digital converters and methods allow for applying the analog signal, a coarse ramp, and a fine ramp to a same input of a comparator. Various dual ramp analog-to-digital converters and methods allow for applying the analog signal to an input of a first comparator, applying a coarse ramp to the input of the first comparator through a coarse ramp switch, applying the analog signal to an input of a second comparator, and applying a fine ramp to another input of the second comparator.

Abstract: An image sensor includes a pixel array, a plurality of column readout lines, and a plurality of column readout circuits. The pixel array includes a plurality of pixels arranged in a plurality of rows and a plurality of columns. Each of the plurality of column readout lines is connected to a corresponding at least two pixels of the plurality of pixels. Each of the plurality of column readout circuits is connected to a corresponding column readout line of the plurality of column readout lines and includes an amplifier, a first capacitor connected between the corresponding column readout line and an input of the amplifier, and a second capacitor connected between the corresponding column readout line and the input of the amplifier.

Abstract: An image sensor of various embodiments includes a pixel array. The pixel array includes a pixel having a photodiode and a transfer gate. The pixel array in various embodiments further includes an antiblooming channel extending from the photodiode to either (i) a pixel output area, or (ii) a drain of a source follower transistor. A method of some embodiments includes (i) driving from a first row driver one or more control signals over one or more control lines to one or more pixels, and (ii) driving from a second row driver the one or more control signals over the one or more control lines to the one or more pixels.

Abstract: An A/D converter suitable for use in a system in which the signal power of noise increases with the signal power of the signal, such as an imaging system, utilizes a variable quantization system for converting analog signals into digital signals. The variable quantization is controlled so that at low signal levels the quantization is similar or identical to conventional A/D converters, while the quantization level is increased at higher signal levels. Thus, higher resolution is provided at low signal levels while lower resolution is produced at high signal levels.

Abstract: An imaging system features high speed digitization of pixel signals by utilizing top and bottom digitization circuits which pipeline sample-and-hold operations with analog-to-digital conversion. In operation, while one digitization circuit is performing a sample-and-hold operation, the other digitization circuit is performing analog-to-digital conversion. The speed of the imaging system may be further increased by pipelining and interleaving operations within the top and bottom digitization circuits by using additional sets of sample-and-hold circuits and analog-to-digital converters.

Abstract: An A/D converter suitable for use in a system in which the signal power of noise increases with the signal power of the signal, such as an imaging system, utilizes a variable quantization system for converting analog signals into digital signals. The variable quantization is controlled so that at low signal levels the quantization is similar or identical to conventional A/D converters, while the quantization level is increased at higher signal levels. Thus, higher resolution is provided at low signal levels while lower resolution is produced at high signal levels.

Abstract: An image sensor circuit of various embodiments includes a pixel array with a plurality of pixel circuits arranged in a plurality of rows and a plurality of columns. Each column of the pixel array includes a corresponding first set of pixel circuits connected to output analog pixel signals to a respective first column readout line, and a corresponding second set of pixel circuits connected to output analog pixel signals to a respective second column readout line. Two or more analog-to-digital conversion circuits may be provided for each column of pixel circuits in the pixel array, and two or more rows of pixel circuits in the pixel array may be activated to output analog pixel signals to corresponding column readout lines at a same time.

Abstract: The present invention provides an improved shared amplifier circuitry and method of operation which minimizes offset and column to column fixed pattern noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output and saves chip area. This is accomplished by simultaneously sampling and storing charge accumulated signals from a first and a second desired pixel from a respective first and second column. The circuit amplifies the first charge signal and then samples and amplifies the reset signal of the first desired pixel and subsequently outputs the amplified first charge signal and the reset signal. Then the circuit amplifies the second charge signal and the reset signal of the first desired pixel and subsequently outputs the amplified second charge signal and the reset signal.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that share buffer transistors. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of a shared buffer transistor.