Abstract: Described herein is a method and system for the reduction of noise in a video sequence. When motion is present in the video sequence, this system and method identifies motion data. With the motion data, a Motion Compensated Temporal Filter (MCTF) can apply motion compensation prior to filtering in the time domain. Temporal filtering can be performed to reduce visible noise and other detrimental artifacts.

Abstract: Presented herein are system(s), and method(s), for interlaced to progressive conversion using weighted average of spatial interpolation and weaving. In one embodiment, there is presented a deinterlacer for deinterlacing. The deinterlacer comprises a first circuit and a second circuit. The first circuit measures weave artifacts between an alternate field and a field for a pixel at a pixel position in the alternate field. The second circuit generates a pixel value for the pixel position in the field, where the pixel value is the weighted average of the pixel, and an interpolated value from two or more pixels from the field, where the weighted average is a function of the weave artifacts.

Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.

Abstract: The present invention provides an apparatus and method for providing a programmable inverse discrete cosine transform, wherein the transform coefficients are loaded into a memory area of a core transform device and a variety of coding standards can thereby be handled by the same programmable core device. The core device is configured to process a certain sized data block, and the incoming source blocks are converted to conform to this size. After transformation, the proper sized result can be extracted from the transform device output. A switchable speed-up mode provides for 4-point transforms, rather than 8-point transforms. Alternatively, the invention also provides for dedicated transform hardware to be switchably used in conjunction with programmable transform hardware, depending upon the type of coding being used, and the speed of inverse transform desired.

Abstract: A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digital audio, MPEG video and message data. The system is capable of decoding multiple MPEG SLICEs concurrently. Graphics windows are blended in parallel, and blended with video using alpha blending. During graphics processing, a single-port SRAM is used equivalently as a dual-port SRAM. The video may include both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The system has a reduced memory mode in which video images are reduced in half in horizontal direction only during decoding. The system is capable of receiving and processing digital audio signals such as MPEG Layer 1 and Layer 2 audio and Dolby AC-3 audio, as well as PCM audio signals. The system includes a memory controller.

Abstract: Presented herein are system(s) and apparatus for a memory access unit for accessing data for a module. The memory access unit comprises an output port for providing access requests for lists of addresses in a memory over a link to a memory controller.

Abstract: Presented herein are system(s), method(s), and apparatus for video frame repeat indication and processing. In one embodiment, there is presented a method for transmitting video data. The method comprises transmitting a picture and an indicator with the picture, where the indicator indicates whether the picture is repeated.

Abstract: A system and method are disclosed for performing digital multi-channel decoding of a BTSC composite audio signal. Each subsequent stage of the digital multi-channel decoding process is performed at the lowest sampling rate that yields acceptable performance for that stage. Analog-to-digital conversion of the composite audio signal is performed first to generate a composite digital audio signal. After analog-to-digital conversion, all signal processing may be performed in the digital domain. The composite digital audio signal is digitally filtered to frequency compensate for variations caused by previous stages of processing, including IF demodulation. Digital channel demodulation and filtering are performed to isolate single channels of the composite digital audio signal such as SAP, L?R, and L+R channels.

Abstract: A phase based system and method for determining signal consistency (e.g., in a video signal processing system). Various aspects of the present invention may, for example, comprise receiving a first and second signal, each of which comprises a respective first sub-signal. A receiving module may, for example, effect such receiving. The first and second signals may be synchronized according to, at least in part, aspects of their respective first sub-signals. A signal synchronization module may, for example, effect such synchronization. Phase difference between respective sub-signals of the first and second synchronized signals may be determined (e.g., using sample-wise multiplication). Multiplication and accumulator modules may, for example, effect such a determination. A signal may be generated that is indicative of signal consistency based, at least in part, on the determination of phase difference between the respective sub-signals. An output module may, for example, effect such a signal generation.

Abstract: A video and graphics system provides square graphics pixels to blend images having 640×480 pixels, such as graphics images provided by some set top boxes and intended to be displayed at a 12.27 MHz display sample rate, with images having 704×480 pixels, such as ITU-R 601 compliant images such as NTSC SDTV images, having oblong pixels and displayed at a 13.5 MHz display sample rate. A sample rate converter including a multi-phase-multi-tap filter is used to generate square pixels. The multi-phase-multi-tap filter provides a good balance of sharpness, smoothness, anti-aliasing and reduced ringing. The multi-phase-multi-tap filter can also be used to convert images having 320×480 pixels to images having 704×480 pixels. The multi-tap filter can be used for scan rate conversion of graphics or video images for HDTV or SDTV applications.

Abstract: A system and method for decoding a digital video data stream. In one aspect, a plurality of hardware acceleration modules are used together with a core processor. The accelerators operate in a decoding pipeline wherein, in any given stage, each accelerator operates on a particular macroblock of video data. In the subsequent pipeline stage, each accelerator works on the next macroblock in the data stream, which was worked on by another one of the accelerators in the previous stage. The core processor polls all of the accelerators during each stage. When all accelerators finish their tasks for a given stage, the core processor initiates the next stage. In another aspect, two variable-length decoders are employed to simultaneously decode two macroblock rows of a video frame. Each variable-length decoder works to decode an assigned row and the rows are variable-length decoded in parallel.

Abstract: A phase based system and method for determining signal consistency (e.g., in a video signal processing system). Various aspects of the present invention may, for example, comprise receiving a first and second signal, each of which comprises a respective first sub-signal. A receiving module may, for example, effect such receiving. The first and second signals may be synchronized according to, at least in part, aspects of their respective first sub-signals. A signal synchronization module may, for example, effect such synchronization. Phase difference between respective sub-signals of the first and second synchronized signals may be determined (e.g., using sample-wise multiplication). Multiplication and accumulator modules may, for example, effect such a determination. A signal may be generated that is indicative of signal consistency based, at least in part, on the determination of phase difference between the respective sub-signals. An output module may, for example, effect such a signal generation.

Abstract: Means of communicating between modules in a decoding system. A variable-length decoding accelerator communicates with a core decoder processor via a co-processor interface. In one embodiment, other decoding accelerators, in addition to the variable-length decoder, are adapted to provide status data indicative of their status to a co-processor status register. In another embodiment, a decoding accelerator is controlled by providing commands to the accelerator via posted write operations and polling the accelerator to determine whether the command has been performed. In still another embodiment, a first hardware accelerator communicates with a core decoder processor via a co-processor interface and other decoding accelerators, in addition to the first hardware accelerator, are adapted to provide status data indicative of their status to a co-processor status register.

Abstract: A distributed cable modem termination system of the present invention includes a downstream transmitter hub, an upstream receiver hub, and a head end that communicatively couples to the downstream transmitter hub and to the upstream receiver hub via a packet data network. The head end and the downstream transmitter hub are operable to synchronize a clock of the downstream transmitter hub with a clock of the head end. Further, the upstream receiver hub and the downstream transmitter hub are operable to synchronize a clock of the upstream receiver hub with the clock of the downstream transmitter hub. Clock synchronization between the upstream receiver hub and the downstream transmitter hub are performed using ranging operations supported by at least one cable modem communicatively coupled to both the upstream receiver hub and the downstream transmitter hub via cable modem network plant.

Abstract: A system and method for determining signal consistency (e.g., in a video signal processing system). Various aspects of the present invention may, for example, comprise receiving a first and second signal, each of which comprises respective first and second sub-signals. A receiving module may, for example, effect such receiving. The first and second signals may be synchronized according to, at least in part, aspects of their respective first sub-signals. A signal synchronization module may, for example, effect such synchronization. Relative timing between the respective second sub-signals of the first and second synchronized signals may be determined. A timing differential module may, for example, effect such a determination. Various aspects of the present invention may generate a signal indicative of signal consistency based, at least in part, on the determination of relative timing between the respective second sub-signals. An output module may, for example, effect such a signal generation.

Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The system may use anti-aliased text and graphics to provide high quality display of graphical elements, or glyphs, which represent an image of a character of text or graphics, on television and other displays. The graphical elements may be superimposed over live video or arbitrary graphics imagery.

Abstract: A system and method that provide reduced latency in a video signal processing system. Various aspects of the present invention may comprise transmitting a first video information stream representative of a unit of video information. For example, the transmitted first video information stream may correspond to a video channel. A second video information stream representative of the unit of video information may be transmitted simultaneously with the first video information stream. The second video information stream may also, for example, correspond to the video channel. Various aspects of the present invention may comprise receiving a plurality of simultaneously transmitted video information streams. A video information stream of the plurality of received video information streams may be identified that, when processed, is expected to result in the lowest latency in presenting the unit of video information to the user. The identified video information stream may then be so processed.

Abstract: A system and method that provide reduced latency in a video signal processing system. Various aspects of the present invention may comprise generating and receiving a request for a unit of video information. A video transmission system may, for example, receive the request for the unit of video information and communicate the unit of video information to a video receiver. For example, the video transmission system may transmit a first portion of the unit of video information at a rate that is faster than a typical steady-state transmission rate for the unit of video information, and the video transmission system may transmit a second portion of the unit of video information at the typical steady-state transmission rate for the unit of video information. A video receiver may then receive the first and second portions of the unit of video information at respective reception rates.

Abstract: A system and method that provide reduced latency in a video signal processing system. Various aspects of the present invention may comprise receiving a current request from a user for first video information. Such a request may, for example, be received with a user interface module. A first video stream and a second video stream may be received simultaneously, where the first video stream comprises the first video information currently requested by the user, and the second video stream comprises second video information not currently requested by the user. A video receiver module may, for example, perform such receiving. The first video stream may be processed to present the first video information to the user at the current time. Further, the second video stream may be pre-processed in preparation for being presented to the user in the future. A video processing module may, for example, perform such video stream processing.

Abstract: Processing data samples may comprise partitioning the data samples in a first set of data bits and a second set of data bits and utilizing at least some of the first and second set of data bits while operating under a first condition. Only at least some of the first set of data bits may be utilized while operating under a second condition. The first condition may be a normal operating condition, while the second condition may be a performance restricted condition. The first set of data bits may be more significant bits and the second set of bits may be less significant bits. At least some of the first and second set of data bits may be utilized while bandwidth is available. Under the second condition, other values may be substituted for the data values from the second set that were not read in a read operation.