Abstract: The present invention relates to high speed communications, in particular, to an interface device between a transmitting device and a receiving device of a transmission system, wherein the transmitting device is capable of automatic compensation of cross-talk timing errors in the interface device, for a group of signals, by using information stored in a storage attached to that interface device. Preferably, the data stored in said storage comprises data on interconnections between said first and second plurality of terminals and data on crosstalk timing errors in said transmission lines relating to a specific data pattern, for each of said stored interconnection.

Abstract: A means for reducing the power consumption of the transmitter by storing the recent history of the transmitted data using a string of gates with taps from the string taken at points determined by the propagation delay of each gate and controlling driving transistors as a function of comparison of that history with input data so that, either the signal is driven into the transmission line at full strength, or at a level near the minimum needed to retain the state in the receiver. The advantage of the invention is that the line capacitance decays through the terminating resistors or discharge transistors, such that when the next state change is needed, then line has less stored energy needing to be discharged.

Abstract: The present invention relates to the reduction of artifacts introduced by sending data at a higher rate than the bandwidth of the communication channel, such as the voltage and current offsets introduced in the data at the receiver as a function of the preceding data.

Abstract: The present invention relates in general to the field of generation of precise electrical signals, in particular, to a technique for providing accurate delays of signals using a controllable delay line, and is applicable to the areas of high speed communication and memory testing equipment. According to the present invention, an auxiliary reference channel having a delay line which is identical to the main delay line is incorporated into vernier silicon die to allow automatic adjustment of the delay in the main delay line using a reference periodical signal applied to the auxiliary delay line.

Abstract: A timing control device and method for minimizing timing uncertainties due to skew and jitter, wherein a device for the compensation of timing errors in multiple channel electronic devices comprises at least one register having a plurality of channels comprising: a clock for providing a clock signal; a reference signal generator for generating reference signals for deskewing the registers. For each register, a corresponding feedback loop is associated for the relative alignment of the register's timing. The feedback loop comprises a device for detecting a deviation from a predetermined level of probability of reading by the register of a desired symbol on a boundary of two reference channel symbols in a sequence, and a set of delay devices which use the detected values of probability to generate a feedback signal.

Abstract: A high speed communication apparatus with means for reducing timing uncertainty providing a high accuracy of transferring and receiving signals by intelligent skew calibration of the apparatus. The system for reducing timing uncertainty of a communication apparatus comprises a plurality of driving registers for transmitting signals; a plurality of receiving registers for receiving signals; a main clock for generating a main clock signal; a reference clock for generating reference signals for calibrating the registers; and a plurality of phase shift means comprising at least one set of phase shift means associated with each said plurality of registers, for the relative alignment of the register's timing within each plurality.

Abstract: Self-contained underwater re-breathing apparatus having a breathing circuit, an injection system for adding fresh breathable gas to the breathing circuit, and an automatic control system including a microcomputer for monitoring physical parameters in the breathing circuit and controlling the feeding of breathable gas to the breathing circuit in accordance with said physical parameters. The re-breathing apparatus has a bailout system automatically activated in an emergency, where the breathing circuit is shut off, and the diver starts inhaling directly from the breathable gas supply and exaling to the environment. With the system of the invention, a part of the existing closed circuit is used for bailout, and no separate bailout circuit is provided. Therefore, there is no need to incorporate in the mouthpiece means for switching from one breathing circuit to another, and the mouthpiece can be kept smaller and simpler.

Abstract: The present invention relates to a pull-up structure with variable strength, which combines a resistor network with N type MOS transistors. According to the invention, the pull up structure comprises an N-channel type MOSFET with a resistor in parallel. Alternatively, a resistor is connected between the terminal of the pull up and a voltage supply, or between the source of the N Type MOSFET and the terminal of the pull up, i.e. in series with the gate. This allows the pull up to be varied to compensate for process and temperature variations around a predefined pull-up strength, and at the same time provides low parasitic capacitance and a good dynamic response of the pull-up structure.

Abstract: A means for reducing the power consumption of the transmitter by storing the recent history of the transmitted data using a string of gates with taps from the string taken at points determined by the propagation delay of each gate and controlling driving transistors as a function of comparison of that history with input data so that, either the signal is driven into the transmission line at full strength, or at a level near the minimum needed to retain the state in the receiver.

Abstract: The present invention relates to a transmitter for high speed communication systems, comprising a plurality, preferably two, drivers each having series terminating resistor, wherein the series terminating resistors are joined at the transmission line. The drivers are controlled in two modes. In the first mode, a control unit supplies drivers with a signal which is a function of input data, to provide the transmitter drives a communication line with an output impedance equal to the parallel effect of all the terminating resistors. In the second mode, the control unit generates a signal to make the drivers with respective series terminating resistors acting as a parallel termination circuit. No actual data is transmitted in this mode. In a preferable embodiment, to achieve this, one driver or a group of drivers drives one logic level signal, while the other drivers drives the inverse to this signal.

Abstract: Bidirectional differential point to point simultaneous high speed signalling is provided between integrated circuits with highly effective echo canceling. Each integrated circuit comprises a transmitter for transmitting a first signal to another integrated circuit and a receiver for receiving a second signal from the other integrated circuit. The transmitter has an output buffer; a receiver has a receiver buffer and is co-located on the same integrated circuit; and a differential buffer is coupled between the input of the transmitter buffer and the output of the receiver buffer. To increase the quality of receiving the second signal, a third signal adjusted in phase and amplitude is coupled at the output of the receive buffer, so that the echoing of the first signal is canceled. Preferably, the rise time of the third signal is also adjusted.

Abstract: Bidirectional differential point to point simultaneous high speed signalling is provided between integrated circuits with highly effective echo canceling. Each integrated circuit comprises a transmitter for transmitting a first signal to another integrated circuit and a receiver for receiving a second signal from the other integrated circuit. The transmitter has an output buffer; a receiver has a receiver buffer and is co-located on the same integrated circuit; and a differential buffer is coupled between the input of the transmitter buffer and the output of the receiver buffer. To increase the quality of receiving the second signal, a third signal adjusted in phase and amplitude is coupled at the output of the receive buffer, so that the echoing of the first signal is canceled.

Abstract: The present invention relates to a transmitter for high speed communication systems, comprising a plurality, preferably two, drivers each having series terminating resistor, wherein the series terminating resistors are joined at the transmission line. The drivers are controlled in two modes.

Abstract: A high precision receiver with a means to reduce or compensate the skew caused by the receiver's hysteresis by using a dynamic reference that is varied depending on a current output signal. To avoid oscillation, the reference signal can be switched over with a certain delay.

Abstract: A data transmission means and method employing the phase noise characteristics within the receiving registers to measure and control the characteristics of the channel as a function of the data pattern and to compensate for production tolerances within the channel by altering the timing characteristics of the signal at either the transmitter or receiver as a function of the data. Time offsets between different signals that form the communication channel are measured for different frequencies and/or for different data patterns transmitted through the channel and stored to compensate for an inter-signal skew by performing relative alignment of the measured offsets to a main clock edge.

Abstract: The present invention relates to systems for communicating with synchronous devices, in particular, to automatic test equipment (ATE) for memory device testing and, more specifically, to a test system for testing a high-speed synchronous memory device using DQS signals obtained from the memory device to achieve the precise fault strobe timing characteristics. The test system for testing a memory device comprises a synchronisation unit for triggering fault strobe generators with respect to DQS signals from the memory device under test. The invention is particularly appropriate for testing memory devices having reference signal for data receiver synchronisation, such as DDR Synchronous Dynamic Random Access Memory (DDR SDRAM), DDR SGRAM (Synchronous Graphics Random Access Memory), DDR II SDRAM, QDR SRAM, etc.

Abstract: A distributed terminator for terminating a transmission line linking a plurality of integrated circuits. The terminator comprises a plurality of resistors and a capacitor that is usually an ESD structure. The values of the resistors are such that the reflection co-efficient of the combined termination is lower across the bandwidth of the signal being transmitted than a reflection coefficient with a termination using resistors in the same topology where the effective value of the resistors is equal to the line impedance.

Abstract: Automatic control system for a rebreather, the automatic control system comprising sensors, a microcontroller and an indicator, the microcontroller being adapted to analyse readings of the sensors and, when abnormal readings are detected, actuate a bailout, generate a safety instruction to the diver and display this instruction on the indicator. The re-breathing apparatus has a bailout system automatically activated in an emergency, where the breathing circuit is shut off, and the diver starts inhaling directly from the breathable gas supply and exaling to the environment.

Abstract: Self-contained underwater re-breathing apparatus having a breathing circuit, an injection system for adding fresh breathable gas to the breathing circuit, and an automatic control system including a microcomputer for monitoring physical parameters in the breathing circuit and controlling the feeding of breathable gas to the breathing circuit in accordance with said physical parameters. The re-breathing apparatus has a bailout system automatically activated in an emergency, where the breathing circuit is shut off, and the diver starts inhaling directly from the breathable gas supply and exaling to the environment.

Abstract: The present invention relates to the reduction of artifacts introduced by sending data at a higher rate than the bandwidth of the communication channel, such as the voltage and current offsets introduced in the data at the receiver as a function of the preceding data.