Abstract: An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

Abstract: An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

Abstract: An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

Abstract: An electrical switch for an electric power tool. The electrical switch has a contact system that can be switched between an off position and an on position, and having a movable actuating means or switching the contact system. The actuating means comprises a plunger and a contact piece. The contact piece acts on the contact system for the purpose of switching. A coupling element is provided, such that the plunger can be brought into and out of interaction with the contact piece. The interaction is effected such that it is made possible for the contact system to be switched into the on position and the off position by means of the plunger, and for the contact system to be switched into the off position independently of the plunger.

Abstract: An electrical switch for an electric power tool. The electrical switch has a contact system that can be switched between an off position and an on position, and having a movable actuating means for switching the contact system. The actuating means comprises a plunger and a contact piece. The contact piece acts on the contact system for the purpose of switching. A coupling element is provided, such that the plunger can be brought into and out of interaction with the contact piece. The interaction is effected such that it is made possible for the contact system to be switched into the on position and the off position by means of the plunger, and for the contact system to be switched into the off position independently of the plunger.

Abstract: A discharging device for pharmaceutical liquids having an actuator for carrying out a discharging operation of a pharmaceutical liquid. A first subordinate unit of the actuator has a discharge orifice, and a second subordinate unit is displaceable relative to the first subordinate unit for carrying out the discharging operation. The two subordinate units together delimit a buffer chamber from which a liquid passageway leads to the discharge orifice. A liquid-containing bag is accommodated in the buffer chamber and has film-like walls. The actuator and the bag are coordinated such that displacement of the subordinate units of the actuator relative to each other causes opening of the bag and reduction in the volume of the buffer chamber with consequent volume reduction of the liquid-containing bag and discharge of liquid through the discharge orifice.

Abstract: An imprint mask for defining a structure on a substrate is provided with a probe which generates a signal as a function of the displacement of the probe by a force with a lateral component. The imprint mask is aligned relative to a substrate with an alignment mark based upon an interaction of the probe and the alignment mark.

Abstract: According to one embodiment, a method for fabricating a contact is provided. The method can include a step of depositing a Ti layer in order to completely fill a contact hole and on a surrounding surface of an insulation layer. The method can also include a step of partially converting the Ti layer into a TiN layer in such a manner that a TiN layer is provided on the top side in the contact hole. Further, the method can include a step of polishing back the Ti layer and any remaining TiN layer on the surrounding surface of the insulation layer in a single-stage polishing step.

Abstract: A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact hole is formed in the insulating layer. A metal-containing layer is subsequently deposited on the insulating layer and the surface region of the doping region that is uncovered by the contact hole. In a subsequent thermal process having two steps, first the metal-containing layer is reacted with the silicon of the doping region to form a metal silicide layer and then the rest of the metal-containing layer is converted into a metal-nitride-containing layer in a second thermal step.

Abstract: A method for determining relevant deposition parameters in i-PVD processes, includes, first calculating the reaction rates for desired reagents of the gas plasma and of a metal and/or metal compound to be deposited, then simulating the edge coverage of a predetermined structure with the deposited metal based upon the calculated reaction rates with systematic variation of the relevant deposition parameters, and compiling variant tables therefrom. By comparing an experimental verification of the simulated edge coverage by imaging the edge coverage of the metal layer deposited over the determined structure, e.g., using a TEM cross-section, with the simulated deposition parameters for the edge coverages that have been recorded in the variant table, it is possible to read the deposition parameters that are of relevance to the process from the variant table.

Abstract: The invention relates to a method for fabricating a microcontact spring on a substrate (1) with at least one contact pad (2) and a first insulator layer (13) with a window above the contact pad (2).

Abstract: The present invention provides a contact for an integrated circuit which, in order to connect a first line plane to a second line plane, runs through a contact hole in an insulation layer located between these planes, which contact consists entirely of Ti and/or TiN. The invention also provides a corresponding fabrication method.

Abstract: A method for depositing a two-layer diffusion barrier on a semiconductor wafer consisting of a TaN layer and a Ta layer serving as a carrier layer for copper interconnects. The TaN layer is inventively deposited at temperatures above 200° C. in a first step, and the Ta layer is deposited in a second step while cooling the semiconductor wafer to a temperature below 50° C.

Abstract: During the fabrication of patterned gate layer stacks for transistors in integrated semiconductor circuits, a lower and an upper gate layer are deposited. Both layers are patterned laterally. The lower gate layer made of polysilicon is oxidized to bind impurity ions that have indiffused near its sidewall spatially in an oxide. If the upper gate layer is composed of tungsten, the latter can be damaged during the oxidation and the conductivity of the gate layer stack can be reduced. Sidewall coverings deposited onto the upper gate layer before the oxidation also do not afford protection against a tungsten oxidation if the sidewall oxide grows from the side more deeply into the gate layer stack than as far as the inner sides of the sidewall coverings. The patterning of the lower gate layer is divided into two separate process steps between which the sidewall coverings are formed.

Abstract: In a method for forming a trench capacitor a first layer of silicon oxide is deposited in a storage trench and a layer of silicon is deposited over the first layer by a chemical vapor deposition process. A layer of an oxidizable metal is deposited over the layer of silicon. The layer of silicon and the layer of the oxidizable metal are subsequently oxidized to form a layer of silicon oxide and metal oxide.

Abstract: The invention relates to a method for fabricating a microcontact spring on a substrate (1) with at least one contact pad (2) and a first insulator layer (13) with a window above the contact pad (2).

Abstract: A method for determining relevant deposition parameters in i-PVD processes, includes, first calculating the reaction rates for desired reagents of the gas plasma and of a metal and/or metal compound to be deposited, then simulating the edge coverage of a predetermined structure with the deposited metal based upon the calculated reaction rates with systematic variation of the relevant deposition parameters, and compiling variant tables therefrom. By comparing an experimental verification of the simulated edge coverage by imaging the edge coverage of the metal layer deposited over the determined structure, e.g., using a TEM cross-section, with the simulated deposition parameters for the edge coverages that have been recorded in the variant table, it is possible to read the deposition parameters that are of relevance to the process from the variant table.

Abstract: A method for depositing a two-layer diffusion barrier on a semiconductor wafer consisting of a TaN layer and a Ta layer serving as a carrier layer for copper interconnects. The TaN layer is inventively deposited at temperatures above 200° C. in a first step, and the Ta layer is deposited in a second step while cooling the semiconductor wafer to a temperature below 50° C.

Abstract: A process for producing metal-containing layers, in particular metal-containing diffusion barriers, contact layers and/or antireflection layers. The process according to the invention has a first step in which a metal layer having a predetermined thickness at an elevated temperature is applied to a semiconductor structure. Next, the metal layer is cooled in a nitrogen-containing atmosphere, resulting in a metal nitride layer being formed.

Abstract: The connection element in an integrated circuit has a layer structure arranged between two conductive structures. The layer structure has a dielectric layer which can be destroyed by application of a predetermined voltage. At least one conductive structure is composed of tungsten. The conductive structure adjoins a conductive layer made of tungsten or a tungsten compound, which is a constituent part of the layer structure and which adjoins the dielectric layer.