Patents by Inventor Alexander V. Rylyakov
Alexander V. Rylyakov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130216241Abstract: A technique is provided for configuring an optical receiver. A photo detector is connected to a load resistor, and the photo detector includes an internal capacitance. A current source is connected through a switching circuit to the load resistor and to the photo detector. The current source is configured to discharge the internal capacitance of the photo detector. The switching circuit is configured to connect the current source to the internal capacitance based on a previous data bit.Type: ApplicationFiled: February 16, 2012Publication date: August 22, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jonathan E. Proesel, Alexander V. Rylyakov, Clint L. Schow, Yurii A. Vlasov
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Publication number: 20130181233Abstract: Processing for a silicon photonics wafer is provided. A silicon photonics wafer that includes an active silicon photonics layer, a thin buried oxide layer, and a silicon substrate is received. The thin buried oxide layer is located between the active silicon photonics layer and the silicon substrate. An electrical CMOS wafer that includes an active electrical layer is also received. The active silicon photonics layer of the silicon photonics wafer is flip chip bonded to the active electrical layer of the electrical CMOS wafer. The silicon substrate is removed exposing a backside surface of the thin buried oxide layer. A low-optical refractive index backing wafer is added to the exposed backside surface of the thin buried oxide layer. The low-optical refractive index backing wafer is a glass substrate or silicon substrate wafer. The silicon substrate wafer includes a thick oxide layer that is attached to the thin buried oxide layer.Type: ApplicationFiled: January 18, 2012Publication date: July 18, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fuad E. Doany, Benjamin G. Lee, Alexander V. Rylyakov, Clint L. Schow, Marc A. Taubenblatt
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Patent number: 8482352Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.Type: GrantFiled: June 30, 2010Date of Patent: July 9, 2013Assignee: International Business Machines CorporationInventors: Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow
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Patent number: 8476945Abstract: Phase profile generator systems and methods are disclosed. A system includes a signal generator, a target phase trajectory module, an error detector and a control loop filter. The signal generator is configured to generate an output signal. In addition, the target phase trajectory module is configured to track a target phase trajectory and determine a next adjustment of the output signal to conform the output signal to a portion of the target phase trajectory. Further, the error detector is configured to determine an error between the output signal and a current target phase trajectory value that precedes the portion of the target phase trajectory, where the determination of the error is independent of the next adjustment of the output signal. Moreover, the control loop filter is configured to control the signal generator in accordance with both the next adjustment and the error to generate a phase profile.Type: GrantFiled: March 23, 2011Date of Patent: July 2, 2013Assignee: International Business Machines CorporationInventors: Danny Elad, Daniel J. Friedman, Alexander V. Rylyakov, Jose A. Tierno
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Patent number: 8456240Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.Type: GrantFiled: August 24, 2012Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow
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Publication number: 20130076449Abstract: Techniques for improved tuning control of varactor circuits are disclosed. For example, an apparatus comprises a plurality of varactors for tuning a frequency value. The plurality of varactors comprises approximately sqrt(2N) varactors, where N is a number of tunings steps and the plurality of varactors are respectively sized as 1x, 2x, 3x, 4x, . . . , approximately sqrt(2N)x, and where x is a unit of capacitance. A given one of the N tuning steps may be represented by more than one combination of varactors. This may be referred to as redundant numbering.Type: ApplicationFiled: September 26, 2011Publication date: March 28, 2013Applicant: International Business Machines CorporationInventors: Herschel A. Ainspan, Daniel J. Friedman, Alexander V. Rylyakov, Jose A. Tierno
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Patent number: 8399292Abstract: Fabricating a semiconductor chip with backside optical vias is provided. A silicon wafer is received for processing. The silicon wafer includes an optically transparent oxide layer on a frontside of the silicon wafer. A complementary metal-oxide-semiconductor layer is formed on top of the optically transparent oxide layer. A backside of the silicon wafer is etched to form optical vias in a silicon substrate using the optically transparent oxide layer as an etch-stop.Type: GrantFiled: June 30, 2010Date of Patent: March 19, 2013Assignee: International Business Machines CorporationInventors: Fuad Elias Doany, Christopher Vincent Jahnes, Clint Lee Schow, Mehmet Soyuer, Alexander V. Rylyakov
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Publication number: 20130063218Abstract: There is provided a tank based oscillator. The oscillator includes one or more active devices, one or more passive devices, and a tank circuit decoupled from the active devices using at least one of the one or more passive devices. A coupling ratio between the tank circuit and the one or more active devices is set such that a maximum value of an oscillation amplitude of the tank circuit is limited based upon a breakdown of only the one or more passive devices.Type: ApplicationFiled: September 9, 2011Publication date: March 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: BODHISATWA SADHU, JEAN-OLIVER PLOUCHART, SCOTT K. REYNOLDS, ALEXANDER V. RYLYAKOV, JOSE A. TIERNO
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Publication number: 20130057348Abstract: A circuit includes a transimpedance amplifier portion having a first input node and a second input node, and a feedback circuit portion comprising a first transistor having a drain terminal connected to the first input node, a source terminal, and a gate terminal, a second transistor having a drain terminal connected to the second input node, a source terminal, and a gate terminal, and a third transistor having a drain terminal connected to the source terminal of the first transistor and the source terminal of the second terminal.Type: ApplicationFiled: September 7, 2011Publication date: March 7, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jonathan E. Proesel, Alexander V. Rylyakov, Clint L. Schow, Jose A. Tierno
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Publication number: 20130057327Abstract: There is provided a method for reducing lock time in a phase locked loop. The method includes detecting a saturation condition on a path within the phase locked loop. The method further includes temporarily applying saturation compensation along the path when the saturation condition is detected.Type: ApplicationFiled: September 7, 2011Publication date: March 7, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: MARK FERRISS, ALEXANDER V. RYLYAKOV, JOSE A. TIERNO
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Publication number: 20120319805Abstract: A transmission line and method for implementing includes a plurality of segments forming an electrical path and a continuous optical path passing through the segments. Discrete inductors are formed between and connect adjacent segments. The inductors are formed in a plurality of metal layers of an integrated circuit to balance capacitance of an optical modulator which includes the transmission line to achieve a characteristic impedance for the transmission line.Type: ApplicationFiled: August 30, 2012Publication date: December 20, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: WILLIAM M. GREEN, Alexander V. Rylyakov, Clint S. Schow, Yurii A. Vlasov
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Publication number: 20120313704Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.Type: ApplicationFiled: August 24, 2012Publication date: December 13, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: FUAD E. DOANY, ALEXANDER V. RYLYAKOV, CLINT L. SCHOW
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Patent number: 8294525Abstract: Apparatuses and methods are provided relating to a voltage controlled oscillator (VCO) based on current starved inverting delay stages; wherein in each stage a PMOS transistor as header and an NMOS transistor as footer are used with their gate-to-source voltages always equal to analog control voltage. The analog control voltage is also used as the supply voltage of the oscillator. An exemplary apparatus includes a VCO of n stages, where n is an odd number and where each stage includes a current starved inverter where the analog control voltage is also used as the supply voltage of each delay stage.Type: GrantFiled: June 18, 2010Date of Patent: October 23, 2012Assignee: International Business Machines CorporationInventors: John Francis Bulzacchelli, Zeynep Toprak Deniz, Daniel Joseph Friedman, Shahrzad Naraghi, Alexander V Rylyakov
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Publication number: 20120262149Abstract: A method and system are disclosed for measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL). In one embodiment, the method comprises introducing multiple phase errors in the PLL, measuring a specified aspect of the introduced phase errors, and determining a value for the specified parameter using the measured aspects of the introduced phase errors. In one embodiment, the phase errors are introduced repetitively in the PLL, and these phase errors produce a modified phase difference between the reference signal and the feedback signal in the PPL. In one embodiment, crossover times, when this modified phase difference crosses over a preset value, are determined, and these crossover times are used to determine the value for the specified parameter. In an embodiment, the parameter is calculated as a mathematical function of the crossover times. The parameter may be, for example, the bandwidth of the PLL.Type: ApplicationFiled: April 18, 2011Publication date: October 18, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mark Ferriss, Arun S. Natarajan, Benjamin D. Parker, Alexander V. Rylyakov, Jose A. Tierno, Soner Yaldiz
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Publication number: 20120242383Abstract: Phase profile generator systems and methods are disclosed. A system includes a signal generator, a target phase trajectory module, an error detector and a control loop filter. The signal generator is configured to generate an output signal. In addition, the target phase trajectory module is configured to track a target phase trajectory and determine a next adjustment of the output signal to conform the output signal to a portion of the target phase trajectory. Further, the error detector is configured to determine an error between the output signal and a current target phase trajectory value that precedes the portion of the target phase trajectory, where the determination of the error is independent of the next adjustment of the output signal. Moreover, the control loop filter is configured to control the signal generator in accordance with both the next adjustment and the error to generate a phase profile.Type: ApplicationFiled: March 23, 2011Publication date: September 27, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: DANNY ELAD, DANIEL J. FRIEDMAN, ALEXANDER V. RYLYAKOV, JOSE A. TIERNO
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Patent number: 8264285Abstract: A digitally controlled circuit and method includes an error input coupled to a proportional path. The proportional path includes a selector which directly receives the error input as a select signal. The selector receives a proportional control weight from a location other than the proportional path wherein the proportional control weight is input to a digitally controlled oscillator (DCO).Type: GrantFiled: July 17, 2008Date of Patent: September 11, 2012Assignee: International Business Machines CorporationInventors: Alexander V. Rylyakov, Jose A. Tierno
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Publication number: 20120224849Abstract: In one embodiment, the invention provides an optical interconnect comprising a transmitter for generating and transmitting an optical signal, a receiver for receiving the optical signal from the transmitter and for converting the received optical signal to an electrical signal, and a pre-transmitter distort circuit for applying a pre-transmitter distort signal to the transmitter to adjust the shape of the optical signal generated by the transmitter. Distortions are introduced into the optical signal when the optical signal is generated, transmitted to the receiver, and converted to the electrical signal. As a result of the signal applied to the transmitter by the pre-transmitter distort circuit, the optical signal generated by the transmitter has distortions to compensate for the distortions introduced into the optical signal, wherein the electrical signal, into which the optical signal is converted, has a desired shape.Type: ApplicationFiled: March 2, 2011Publication date: September 6, 2012Applicant: International Business Machines CorporationInventors: Alexander V. Rylyakov, Clint L. Schow
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Publication number: 20120224868Abstract: An optical receiver, a method of operating an optical receiver, a correction based transimpedance amplifier circuit, and a method of adjusting an output of a transimpedance amplifier. In one embodiment, the optical receiver comprises an optical-to-electrical converter, a transimpedance amplifier, and a correction circuit. The optical-to-electrical converter is provided for receiving an optical signal and converting the optical signal to an electrical signal. The transimpedance amplifier is provided for receiving the electrical signal from the optical-to-electrical converter and for generating from the electrical signal an amplified electrical signal. The amplified electrical signal has inter symbol interference resulting from a reduced bandwidth of the transimpedance amplifier.Type: ApplicationFiled: March 2, 2011Publication date: September 6, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jonathan E. Proesel, Alexander V. Rylyakov, Clint L. Schow, Yurii A. Vlasov
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Patent number: 8222936Abstract: Phase and frequency detectors and techniques are disclosed. For example, apparatus comprises a first circuit for receiving first and second clock signals and for generating at least one signal indicative of a phase difference between the first and second clock signals. The apparatus also comprises a second circuit for receiving the at least one signal generated by the first circuit and, in response to the at least one received signal, generating at least one output signal, wherein a frequency associated with the at least one output signal is proportional to a frequency difference between the first and second clock signals.Type: GrantFiled: June 11, 2010Date of Patent: July 17, 2012Assignee: International Business Machines CorporationInventors: Daniel J. Friedman, Alexander V. Rylyakov, José A. Tierno
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Publication number: 20120155864Abstract: Systems and methods for processing an optical signal are disclosed. The optical signal is converted to a voltage signal and the voltage signal is amplified. In addition, a signal strength and/or a signal quality parameter is monitored and an indication of the signal strength and/or a signal quality parameter is generated. Further, a gain and/or an operating bandwidth on the conversion or the amplification can be adjusted based on the indication to reduce power consumption of an optical receiver.Type: ApplicationFiled: December 17, 2010Publication date: June 21, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Petar K. Pepeljugoski, Alexander V. Rylyakov, Clint L. Schow, Mehmet Soyuer