Patents by Inventor Alexander Wilson

Alexander Wilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7743566
    Abstract: A structural assembly has a first set of first elongate structural members alternately spaced apart from a second set of second elongate structural members by locking blocks, the first set defining a first plane and the second set defining a second plane forming an intersection at an angle with the first plane, the structural members and locking blocks defining an assembly of adjoined blocks and structural members at the intersection, and a compressive mechanism spanning the assembly of adjoined blocks and structural members at the intersection. Compressing the adjoined blocks and structural members by the spanning compression mechanism locks the blocks and structural members together in a manner to resist applied forces.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: June 29, 2010
    Inventors: Michael Kozel, David Alexander Wilson
  • Patent number: 7743583
    Abstract: A structural assembly has a first set of first elongate structural members alternately spaced apart from a second set of second elongate structural members by locking blocks, the first set defining a first plane and the second set defining a second plane forming an intersection at an angle with the first plane, the structural members and locking blocks defining an assembly of adjoined blocks and structural members at the intersection, and a compressive mechanism spanning the assembly of adjoined blocks and structural members at the intersection. Compressing the adjoined blocks and structural members by the spanning compression mechanism locks the blocks and structural members together in a manner to resist applied forces.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: June 29, 2010
    Inventors: Michael Kozel, David Alexander Wilson
  • Publication number: 20100142076
    Abstract: Patterned-media magnetic recording disks are made from a master template that has nondata regions that contain a pattern of one or more discrete nondata islands and discrete gaps, with the pattern representing a scrambled number. All disks made from the master template, or from replica molds made from the master, will have the same patterns. When the disks are DC-magnetized so that all the nondata islands are magnetized in the same direction, these patterns will include one or more of discrete magnetized nondata islands and discrete nonmagnetic gaps that are scrambled in a pseudo-random manner. During operation of the disk drive the patterns are detected by the read head and interpreted within the disk drive using knowledge of the pseudo-random scrambling function, so that reading and writing of data can occur in the conventional manner. If the disks are copied in an attempt to replicate the master template, the resulting disks will be inoperable in a disk drive because of the scrambling.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 10, 2010
    Applicant: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
    Inventors: Zvonimir Z. Bandic, Jorge Campello de Souza, Cyril Guyot, Bruce Alexander Wilson
  • Patent number: 7715137
    Abstract: Servo patterns for patterned media. The servo pattern includes specification of cylinder/track ID with and without a Gray code. The servo pattern space is minimized by the optimum usage of the islands. This is achieved by island allocation rules to take advantage of non-magnetic island. The island allocation also provides for easier lift-off. Logic is used to encode and decode the Gray code. Further, the Gray code is designed to stabilize the magnetic island/non-magnetic island ratio to allow for easier manufacture.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: May 11, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Thomas Robert Albrecht, Mario Blaum, Ksenija Lakovic, Bruce Alexander Wilson, Satoshi Yamamoto
  • Patent number: 7680087
    Abstract: The present invention relates to a state machine which has a dual process which receives and concurrently processes ad-hoc and infrastructure processes. The dual process state concurrently executes both processes by either over-clocking a media access control core, or by routing the processes to multiple media access control cores for processing. The state machine contains an ad-hoc process state which accepts either an ad-hoc or an infrastructure signal, and either processes the signal if the received signal is an ad-hoc signal, or transfers control to an infrastructure process state for processing if the received signal is an infrastructure signal. The state machine also contains an infrastructure process state which accepts either an ad-hoc or an infrastructure signal, and either processes the signal if the received signal is an infrastructure signal, or transfers control to an ad-hoc process state for processing if the received signal is an ad-hoc signal.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: March 16, 2010
    Assignee: Canon U.S.A., Inc.
    Inventors: Paul Chen, Richard Alexander Wilson, Jr.
  • Patent number: 7675703
    Abstract: A system and method accurately clocks write data to the discrete data blocks in a patterned media disk drive. The precise time intervals between successive timing marks in the data tracks are measured by a timing mark detector that counts the integer number of write clock cycles between successive timing marks and the fractional part of a write clock cycle by detecting the phase difference between a timing mark and a reference signal. The resulting timing error is output to a write clock compensator. The write clock is capable of generating equally spaced primary phases and phases intermediate the primary phases. The compensator includes a phase rotator that controls which write clock phase is selected for output. The value in a phase register of the compensator is used to control the phase rotator to advance or retard the write clock phase, and thus to adjust its frequency and phase so as to be synchronized for writing to the data blocks.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: March 9, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Thomas R. Albrecht, David Timothy Flynn, Richard Leo Galbraith, Michael Anthony Moser, Bruce Alexander Wilson, Xiao Z. Wu
  • Patent number: 7605996
    Abstract: A method according to one embodiment comprises detecting a change in a rotational velocity of a magnetic disk or a spindle coupled to the magnetic disk, the change being caused by head-disk contact. A method for detecting head-disk contact according to another embodiment comprises measuring a rotational velocity of a magnetic disk or a spindle coupled to the magnetic disk; detecting a change in the rotational velocity, the change being caused by head-disk contact; and correlating the change in rotational velocity with the head-disk contact.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: October 20, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Peter Michael Baumgart, Charles Raymond Davis, Gary Allan Herbst, Bernhard E. Knigge, Charles Mathew Mate, Bruce Alexander Wilson
  • Publication number: 20090255198
    Abstract: A structural assembly has a first set of first elongate structural members alternately spaced apart from a second set of second elongate structural members by locking blocks, the first set defining a first plane and the second set defining a second plane forming an intersection at an angle with the first plane, the structural members and locking blocks defining an assembly of adjoined blocks and structural members at the intersection, and a compressive mechanism spanning the assembly of adjoined blocks and structural members at the intersection. Compressing the adjoined blocks and structural members by the spanning compression mechanism locks the blocks and structural members together in a manner to resist applied forces.
    Type: Application
    Filed: June 23, 2009
    Publication date: October 15, 2009
    Inventors: Michael Kozel, David Alexander Wilson
  • Publication number: 20090255210
    Abstract: A structural assembly has a first set of first elongate structural members alternately spaced apart from a second set of second elongate structural members by locking blocks, the first set defining a first plane and the second set defining a second plane forming an intersection at an angle with the first plane, the structural members and locking blocks defining an assembly of adjoined blocks and structural members at the intersection, and a compressive mechanism spanning the assembly of adjoined blocks and structural members at the intersection. Compressing the adjoined blocks and structural members by the spanning compression mechanism locks the blocks and structural members together in a manner to resist applied forces.
    Type: Application
    Filed: June 23, 2009
    Publication date: October 15, 2009
    Inventors: Michael Kozel, David Alexander Wilson
  • Publication number: 20090235142
    Abstract: A system corrects errors in a bit stream. The system includes an encoder and a decoder. The encoder encodes the bit stream using a low density parity check code by inserting parity check bits into the bit stream to generate codewords. The decoder decodes the codewords using parity check equations that are based on the low density parity check code. The parity check bits may comprise no more than four percent of the bits in the codewords of the low density parity check code. The low density parity check code can have a minimum separation of at least 7 between any two ones in each row of a parity-check matrix that is based on the low density parity check code. The encoder and the decoder can be defined in hardware using logic circuits that are interconnected to implement a trellis based on the low density parity check code.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Applicant: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Richard Leo Galbraith, Bruce Alexander Wilson, Travis Roger Oenning, Mario Blaum, Ksenija Lakovic, Ivana Djurdjevic
  • Publication number: 20090195902
    Abstract: A method according to one embodiment comprises determining a growth rate of an erase band width between an aggressor track and a substantially unerased portion of a data track on a magnetic medium during a first number of write cycles on the aggressor track; and estimating the erase band width, or derived parameter thereof, for or after a second number of write cycles on the aggressor track, the second number of write cycles being greater than the first number of write cycles.
    Type: Application
    Filed: January 31, 2008
    Publication date: August 6, 2009
    Inventors: Andreas Moser, James Terrence Olson, Bruce Alexander Wilson
  • Publication number: 20090168221
    Abstract: A method according to one embodiment comprises detecting a change in a rotational velocity of a magnetic disk or a spindle coupled to the magnetic disk, the change being caused by head-disk contact. A method for detecting head-disk contact according to another embodiment comprises measuring a rotational velocity of a magnetic disk or a spindle coupled to the magnetic disk; detecting a change in the rotational velocity, the change being caused by head-disk contact; and correlating the change in rotational velocity with the head-disk contact.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Inventors: Peter Michael Baumgart, Charles Raymond Davis, Gary Allan Herbst, Bernhard E. Knigge, Charles Mathew Mate, Bruce Alexander Wilson
  • Patent number: 7502206
    Abstract: An extraordinary magnetoresistive device EMR sensor that is capable of reading two separate tracks of data simultaneously. The EMR sensor has a semiconductor structure with an electrically conductive shunt structure at one side. The other side of the semiconductor structure is connected with a pair of current leads. Each of the current leads is disposed between a pair of voltage leads. Each pair of voltage leads is capable of independently reading a magnetic signal by measuring the voltage potential change across the pair of voltage leads. The EMR structure minimizes the number of leads needed to read two magnetic signals by using a single pair of current leads to read two tracks of data.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: March 10, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Bruce Alvin Gurney, Stefan Maat, Ernesto E. Marinero, Bruce Alexander Wilson
  • Publication number: 20090013636
    Abstract: For attaching wood trim around a door or window frame. In the disclosed system, plastic spline-clips attached to the jambs serve to fix the jamb to the wall. The spline-clips have two splines, which engage slots in the wood trim, forming a dovetail connection between the trim and the splines. The splines are elastic enough to deflect apart to admit the trim, and then spring back to grip the trim and to push the trim tightly against the wall. Grooves cut in the edge faces of the jambs receive lugs on the clips, by which the clips are accurately positioned on the jambs. Also disclosed is a split-jamb system, in which the inside jamb-frame is positioned first, then squared up in the wall opening, and then held in place on the wall by means of with its inside spline-clips; the outside jamb-frame is then assembled to the inside jamb-frame, and the outside jamb-frame locked in place with its outside spline-clips.
    Type: Application
    Filed: August 21, 2007
    Publication date: January 15, 2009
    Inventor: Bryan Alexander WILSON
  • Patent number: 7478153
    Abstract: Managing a plurality of network devices on a network by detecting the presence of at least one of the plurality of network devices on the network by using a first communication protocol, obtaining, by using the first communication protocol, an information block from each of the detected network devices, wherein the information block contains information related to the corresponding network device, formatting each information block into a directory entry, and sending each directory entry to a directory server via a second communication protocol.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: January 13, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Martin Page, Richard Alexander Wilson, Jr.
  • Publication number: 20090006930
    Abstract: A detector generates a detected sequence, and a post processor generates probability values that indicate the likelihood of a plurality of error events in the detected sequence. The post processor partitions the values into first and second subsets. The post processor selects a first most likely value from the first subset of the values and a second most likely value from the second subset of the values. The post processor generates a bit reliability based on the first and the second most likely values.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Ivana Djurdjevic, Richard Leo Galbraith, Bruce Alexander Wilson, Yuan Xing Lee, Travis Roger Oenning, Mario Blaum, Ksenija Lakovic, Zongwang Li
  • Publication number: 20090006931
    Abstract: Techniques are provided that generate bit reliabilities for a detected sequence. A detector generates the detected sequence. According to one embodiment, a post-processor finds a first set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the first bit value, finds a second set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the second bit value, selects a first most likely combination of one or more events of the first set and a second most likely combination of one or more events of the second set, and generates a bit reliability based on the first and the second most likely values.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Applicant: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Ivana Djurdjevic, Bruce Alexander Wilson, Mario Blaum, Richard Leo Galbraith, Ksenija Lakovic, Yuan Xing Lee, Zongwang Li, Travis Roger Oenning
  • Publication number: 20080304173
    Abstract: A system and method accurately clocks write data to the discrete data blocks in a patterned media disk drive. The precise time intervals between successive timing marks in the data tracks are measured by a timing mark detector that counts the integer number of write clock cycles between successive timing marks and the fractional part of a write clock cycle by detecting the phase difference between a timing mark and a reference signal. The resulting timing error is output to a write clock compensator. The write clock is capable of generating equally spaced primary phases and phases intermediate the primary phases. The compensator includes a phase rotator that controls which write clock phase is selected for output. The value in a phase register of the compensator is used to control the phase rotator to advance or retard the write clock phase, and thus to adjust its frequency and phase so as to be synchronized for writing to the data blocks.
    Type: Application
    Filed: June 8, 2007
    Publication date: December 11, 2008
    Applicant: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
    Inventors: Thomas R. Albrecht, David Timothy Flynn, Richard Leo Galbraith, Michael Anthony Moser, Bruce Alexander Wilson, Xiao Z. Wu
  • Patent number: 7458883
    Abstract: An apparatus for abrading a surface is provided. The apparatus has a compact profile and includes a drive mechanism disposed in a housing. The drive mechanism includes a substantially vertical drive shaft rotatably mounted on a first plate and including a drive pulley mounted on the shaft. The drive pulley is rotatably connected to at least one coplanar pulley mounted on a substantially vertical shaft and disposed between the first plate and a second plate attached substantially parallel to the first plate. Thus, use of the apparatus in height-restricted spaces is facilitated.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: December 2, 2008
    Assignee: B A Werk Industries Ltd.
    Inventors: Brian Alexander Wilson, Ronald Eric Kliewer, Charles Donald Beadle
  • Publication number: 20080094742
    Abstract: Servo patterns for patterned media. The servo pattern includes specification of cylinder/track ID with and without a Gray code. The servo pattern space is minimized by the optimum usage of the islands. This is achieved by island allocation rules to take advantage of non-magnetic island. The island allocation also provides for easier lift-off. Logic is used to encode and decode the Gray code. Further, the Gray code is designed to stabilize the magnetic island/non-magnetic island ratio to allow for easier manufacture.
    Type: Application
    Filed: October 19, 2006
    Publication date: April 24, 2008
    Inventors: Thomas Robert Albrecht, Mario Blaum, Ksenija Lakovic, Bruce Alexander Wilson, Satoshi Yamamoto