Patents by Inventor Alexis Gauthier
Alexis Gauthier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220122969Abstract: A bipolar transistor includes a collector region having a first doped portion located in a substrate and a second doped portion covering and in contact with an area of the first doped portion. The collector region has a doping profile having a peak in the first portion and a decrease from this peak up to in the second portion.Type: ApplicationFiled: October 18, 2021Publication date: April 21, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Edoardo BREZZA, Alexis GAUTHIER
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Patent number: 11296205Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.Type: GrantFiled: October 2, 2019Date of Patent: April 5, 2022Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis Gauthier, Pascal Chevalier
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Patent number: 11276752Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.Type: GrantFiled: August 17, 2020Date of Patent: March 15, 2022Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Pascal Chevalier, Gregory Avenier
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Publication number: 20220059672Abstract: A bipolar transistor includes a stack of an emitter, a base, and a collector. The base is structured to have a comb shape including fingers oriented in a plane orthogonal to a stacking direction of the stack.Type: ApplicationFiled: August 13, 2021Publication date: February 24, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Edoardo BREZZA, Pascal CHEVALIER
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Patent number: 11251084Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.Type: GrantFiled: June 23, 2020Date of Patent: February 15, 2022Assignee: STMicroelectronics (Crolles 2) SASInventors: Pascal Chevalier, Alexis Gauthier, Gregory Avenier
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Publication number: 20220013654Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis GAUTHIER, Pascal CHEVALIER
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Patent number: 11145741Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.Type: GrantFiled: October 2, 2019Date of Patent: October 12, 2021Assignees: STMicroelectronics (Grolles 2) SAS, STMicroelectronics SAInventors: Alexis Gauthier, Pascal Chevalier
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Publication number: 20210273052Abstract: A bipolar junction transistor includes an extrinsic collector region buried in a semiconductor substrate under an intrinsic collector region. Carbon-containing passivating regions are provided to delimit the intrinsic collector region. An insulating layer on the intrinsic collector region includes an opening within which an extrinsic base region is provided. A semiconductor layer overlies the insulating layer, is in contact with the extrinsic base region, and includes an opening with insulated sidewalls. The collector region of the transistor is provided between the insulated sidewalls.Type: ApplicationFiled: May 18, 2021Publication date: September 2, 2021Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Julien BORREL
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Patent number: 11038017Abstract: A bipolar junction transistor includes an extrinsic collector region buried in a semiconductor substrate under an intrinsic collector region. Carbon-containing passivating regions are provided to delimit the intrinsic collector region. An insulating layer on the intrinsic collector region includes an opening within which an extrinsic base region is provided. A semiconductor layer overlies the insulating layer, is in contact with the extrinsic base region, and includes an opening with insulated sidewalls. The collector region of the transistor is provided between the insulated sidewalls.Type: GrantFiled: February 19, 2019Date of Patent: June 15, 2021Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Julien Borrel
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Patent number: 10998431Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector connection region. A first epitaxial region forms a collector region doped with a first conductivity type on the collector connection region. The collector region includes a counter-doped region of a second conductivity type. A second epitaxial region forms a base region of a second conductivity type on the first epitaxial region. Deposited semiconductor material forms an emitter region of the first conductivity type on the second epitaxial region. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.Type: GrantFiled: September 16, 2019Date of Patent: May 4, 2021Assignee: STMicroelectronics (Crolles 2) SASInventors: Pascal Chevalier, Alexis Gauthier
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Publication number: 20210057521Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.Type: ApplicationFiled: August 17, 2020Publication date: February 25, 2021Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Pascal CHEVALIER, Gregory AVENIER
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Publication number: 20210057520Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.Type: ApplicationFiled: August 17, 2020Publication date: February 25, 2021Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Pascal CHEVALIER, Gregory AVENIER
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Publication number: 20200411382Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.Type: ApplicationFiled: June 23, 2020Publication date: December 31, 2020Applicant: STMicroelectronics (Crolles 2) SASInventors: Pascal CHEVALIER, Alexis GAUTHIER, Gregory AVENIER
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Publication number: 20200411381Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.Type: ApplicationFiled: June 23, 2020Publication date: December 31, 2020Applicant: STMicroelectronics (Crolles 2) SASInventors: Gregory AVENIER, Alexis GAUTHIER, Pascal CHEVALIER
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Patent number: 10622460Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.Type: GrantFiled: May 9, 2019Date of Patent: April 14, 2020Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Guillaume C. Ribes
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Publication number: 20200111890Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.Type: ApplicationFiled: October 2, 2019Publication date: April 9, 2020Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis GAUTHIER, Pascal CHEVALIER
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Publication number: 20200111889Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.Type: ApplicationFiled: October 2, 2019Publication date: April 9, 2020Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis GAUTHIER, Pascal CHEVALIER
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Publication number: 20200013856Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector connection region. A first epitaxial region forms a collector region doped with a first conductivity type on the collector connection region. The collector region includes a counter-doped region of a second conductivity type. A second epitaxial region forms a base region of a second conductivity type on the first epitaxial region. Deposited semiconductor material forms an emitter region of the first conductivity type on the second epitaxial region. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.Type: ApplicationFiled: September 16, 2019Publication date: January 9, 2020Applicant: STMicroelectronics (Crolles 2) SASInventors: Pascal CHEVALIER, Alexis GAUTHIER
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Patent number: 10468508Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.Type: GrantFiled: January 17, 2019Date of Patent: November 5, 2019Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Pascal Chevalier, Gregory Avenier
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Patent number: 10453919Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector connection region. A first epitaxial region forms a collector region doped with a first conductivity type on the collector connection region. The collector region includes a counter-doped region of a second conductivity type. A second epitaxial region forms a base region of a second conductivity type on the first epitaxial region. Deposited semiconductor material forms an emitter region of the first conductivity type on the second epitaxial region. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.Type: GrantFiled: November 6, 2017Date of Patent: October 22, 2019Assignee: STMicroelectronics (Crolles 2) SASInventors: Pascal Chevalier, Alexis Gauthier