Patents by Inventor Alfio Guarnera

Alfio Guarnera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120187480
    Abstract: An embodiment of a process for manufacturing a power semiconductor device envisages the steps of: providing a body of semiconductor material having a top surface and having a first conductivity; forming columnar regions having a second type of conductivity within the body of semiconductor material, and surface extensions of the columnar regions above the top surface; and forming doped regions having the second type of conductivity, in the proximity of the top surface and in contact with the columnar regions. The doped regions are formed at least partially within the surface extensions of the columnar regions; the surface extensions and the doped regions have a non-planar surface pattern, in particular with a substantially V-shaped groove.
    Type: Application
    Filed: March 29, 2012
    Publication date: July 26, 2012
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Alfio Guarnera, Mario Giuseppe Saggio, Ferruccio Frisina
  • Publication number: 20120187479
    Abstract: An embodiment of a process for manufacturing a power semiconductor device envisages the steps of: providing a body of semiconductor material having a top surface and having a first conductivity; forming columnar regions having a second type of conductivity within the body of semiconductor material, and surface extensions of the columnar regions above the top surface; and forming doped regions having the second type of conductivity, in the proximity of the top surface and in contact with the columnar regions. The doped regions are formed at least partially within the surface extensions of the columnar regions; the surface extensions and the doped regions have a non-planar surface pattern, in particular with a substantially V-shaped groove.
    Type: Application
    Filed: March 29, 2012
    Publication date: July 26, 2012
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Alfio Guarnera, Mario Giuseppe Saggio, Ferruccio Frisina
  • Publication number: 20110049616
    Abstract: An embodiment of a semiconductor structure for a power device integrated on a semiconductor substrate, of a first type of conductivity, and comprising:—an epitaxial layer, of said first type of conductivity, made on said semiconductor substrate, and having a plurality of column structures, of a second type of conductivity, to define a charge balancing region;—an active surface layer made on said epitaxial layer for housing a plurality of active regions; said epitaxial layer comprising a semiconductor separating layer arranged between the charge balancing region and the active surface layer, said semiconductor separating layer decoupling said column structures from said active regions.
    Type: Application
    Filed: August 25, 2010
    Publication date: March 3, 2011
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giuseppe SAGGIO, Alfio GUARNERA, Simone RASCUNA'
  • Publication number: 20100163972
    Abstract: An embodiment of a semiconductor power device provided with: a structural body made of semiconductor material with a first conductivity, having an active area housing one or more elementary electronic components and an edge area delimiting externally the active area; and charge-balance structures, constituted by regions doped with a second conductivity opposite to the first conductivity, extending through the structural body both in the active area and in the edge area in order to create a substantial charge balance. The charge-balance structures are columnar walls extending in strips parallel to one another, without any mutual intersections, in the active area and in the edge area.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 1, 2010
    Applicant: STMICROELECTRONICS S.R.I
    Inventors: Mario Giuseppe SAGGIO, Alfio GUARNERA
  • Publication number: 20090179263
    Abstract: An embodiment of a process for manufacturing a power semiconductor device envisages the steps of: providing a body of semiconductor material having a top surface and having a first conductivity; forming columnar regions having a second type of conductivity within the body of semiconductor material, and surface extensions of the columnar regions above the top surface; and forming doped regions having the second type of conductivity, in the proximity of the top surface and in contact with the columnar regions. The doped regions are formed at least partially within the surface extensions of the columnar regions; the surface extensions and the doped regions have a non-planar surface pattern, in particular with a substantially V-shaped groove.
    Type: Application
    Filed: April 21, 2006
    Publication date: July 16, 2009
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alfio Guarnera, Mario Giuseppe Saggio, Ferruccio Frisina