Patents by Inventor Ali Aiouaz

Ali Aiouaz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220222192
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 14, 2022
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 11308015
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 19, 2022
    Assignee: Kioxia Corporation
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 10521305
    Abstract: In one embodiment, a solid state drive (SSD) with power loss protection (PLP) includes a SSD controller, a secondary controller and a power circuit configured to supply power to the SSD from a power source during normal operation and backup power from a backup power source in response to a loss of power supplied by the power source. In the event of a loss of power, the secondary controller is configured to track the holdup time, or duration of time for which the primary controller can operate on backup power. In one embodiment, the holdup time tracked by the secondary controller is stored in a non-volatile memory in communication with the secondary controller.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 31, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Christopher Delaney, Leland Thompson, John Hamilton, Gordon Waidhofer, Ali Aiouaz
  • Publication number: 20190026244
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Application
    Filed: September 27, 2018
    Publication date: January 24, 2019
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 10120823
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher Delaney, Leland Thompson
  • Patent number: 9983833
    Abstract: A method of updating a file in a solid state drive (SSD) and an SSD configured to update a file in the SSD is disclosed. In one embodiment, the method includes performing one or more writes to a holding file in an auxiliary memory, the one or more writes corresponding to an update for a target file in the auxiliary memory. The method further includes applying the update to the target file in the auxiliary memory when each of the one or more writes has been successfully written to the holding file, and resetting the holding file when less than all of the one or more writes have been successfully written to the holding file. In one embodiment, a flash controller in communication with the auxiliary memory performs the update.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: May 29, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher S. Delaney, Leland W. Thompson
  • Patent number: 9910619
    Abstract: A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: March 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Christopher Delaney, Gordon Waidhofer, Leland Thompson, Ali Aiouaz
  • Publication number: 20170315889
    Abstract: In one embodiment, a solid state drive (SSD) with power loss protection (PLP) includes a SSD controller, a secondary controller and a power circuit configured to supply power to the SSD from a power source during normal operation and backup power from a backup power source in response to a loss of power supplied by the power source. In the event of a loss of power, the secondary controller is configured to track the holdup time, or duration of time for which the primary controller can operate on backup power. In one embodiment, the holdup time tracked by the secondary controller is stored in a non-volatile memory in communication with the secondary controller.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventors: Christopher Delaney, Leland Thompson, John Hamilton, Gordon Waidhofer, Ali Aiouaz
  • Publication number: 20170185350
    Abstract: A method of updating a file in a solid state drive (SSD) and an SSD configured to update a file in the SSD is disclosed. In one embodiment, the method includes performing one or more writes to a holding file in an auxiliary memory, the one or more writes corresponding to an update for a target file in the auxiliary memory. The method further includes applying the update to the target file in the auxiliary memory when each of the one or more writes has been successfully written to the holding file, and resetting the holding file when less than all of the one or more writes have been successfully written to the holding file. In one embodiment, a flash controller in communication with the auxiliary memory performs the update.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher S. Delaney, Leland W. Thompson
  • Publication number: 20170177276
    Abstract: A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Christopher Delaney, Gordon Waidhofer, Leland Thompson, Ali Aiouaz
  • Publication number: 20170177233
    Abstract: A solid state drive includes a dual buffer for buffering incoming write data prior to committal to a non-volatile memory. The buffer is operated to provide a temporary backup of dirty data pending successful completion of a host transfer. The dual buffer may be operated as a primary buffer and a secondary buffer. The primary buffer may be used as the default buffer during normal operation. The secondary buffer is written to during a host transfer that is a cache write to dirty data. A copying process may be used to copy data between the primary and the secondary buffer to preserve the backup data pending successful completion of the host transfer.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Christopher Delaney, Gordon Waidhofer, Leland Thompson, Ali Aiouaz
  • Publication number: 20170090948
    Abstract: A method and a computer readable medium comprising instructions for upgrading a firmware of a peripheral device connected to a host device via a Peripheral Component Interconnect Express (PCIe) bus from the operating system (OS) of the host device is disclosed. In one embodiment, the method and computer readable medium instructions includes halting host device access to the peripheral device after detecting the peripheral device has completed a shutdown sequence, and resetting the peripheral device after a predetermined time period after completion of the shutdown sequence. The method and computer readable medium instructions further includes initializing the firmware stored in a persistent storage location of the peripheral device, and re-establishing a connection between the peripheral device and the host device. In one embodiment, the predetermined time period is greater than a time it takes for the host device to detect the peripheral device has completed the shutdown sequence.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Gordon W. Waidhofer, Ali Aiouaz, Christopher S. Delaney, Leland W. Thompson
  • Patent number: 9558839
    Abstract: A solid state drive has a power failure savings mode that permits a reduction in holdup time for a temporary backup power supply. The solid state drive stores data in a multi-level cell (MLC) mode. In a power fail saving mode system metadata is written in a pseudo Single Level Cell (pSLC) mode. In the normal operating mode page writes are performed in complete blocks. In the power fail save saving mode data from a write buffer is written and additional dummy pages written to reduce the total number of pages that must be written to below a complete block size with the dummy pages providing protection from data corruption.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: January 31, 2017
    Assignee: Toshiba Corporation
    Inventors: Leland W. Thompson, Christopher S. Delaney, Gordon W. Waidhofer, Ali Aiouaz
  • Publication number: 20160268000
    Abstract: A solid state drive has a power failure savings mode that permits a reduction in holdup time for a temporary backup power supply. The solid state drive stores data in a multi-level cell (MLC) mode. In a power fail saving mode system metadata is written in a pseudo Single Level Cell (pSLC) mode. In the normal operating mode page writes are performed in complete blocks. In the power fail save saving mode data from a write buffer is written and additional dummy pages written to reduce the total number of pages that must be written to below a complete block size with the dummy pages providing protection from data corruption.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 15, 2016
    Inventors: Leland W. THOMPSON, Christopher S. DELANEY, Gordon W. WAIDHOFER, Ali AIOUAZ
  • Patent number: 8427315
    Abstract: RFID reader systems, software and methods precompute one or more reader commands, before a tag actually responds to an earlier transmitted command. This way a system can result at a high data rate, while meeting specification requirements of responding within a preset time.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: April 23, 2013
    Assignee: Impinj, Inc.
    Inventors: Ali Aiouaz, David Ord, Omar Khwaja
  • Patent number: 8279045
    Abstract: RFID tags and chips for RFID tags are capable of being inventoried in one or more early attempts. These tags are capable of then refraining from participating in one or more subsequent inventorying attempts. In some embodiments refraining is performed solely by the tag, while in others it is guided by the RFID reader. In some embodiments, an inventoried indicator in the tag becomes updated upon backscattering. The updated value is used by the tag to recognize a subsequent attempt, and thus refrain from participating in it. This permits the subsequent attempt to be used more intensively for inventorying the more elusive, harder-to-read tags, especially in more demanding scenarios.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 2, 2012
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Paul Dietrich, Theron Stanford, Chad Lindhorst, Kambiz Rahimi, Ali Aiouaz, Aanand Esterberg
  • Patent number: 8258918
    Abstract: An RFID reader controller and methods of controlling an RFID reader by an RFID reader controller are provided to limit or prevent the issuing of confidential information such as encryption keys, passwords, shared secrets, and the like to RFID tags if a reader is not authorized. A controller may determine the authorization status of a reader and limit its communication with the reader or instruct the reader to limit an operational aspect of the reader.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: September 4, 2012
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Joel Peshkin, Ali Aiouaz, Scott Cooper
  • Patent number: 8154385
    Abstract: Radio frequency identification (RFID) tags selected for inventorying using combination of preselect and/or post select criteria. The selection commands can be for selecting according to a tag memory content, by invoking the mask address or by comparing other tag characteristics. Selection criteria can be determined locally at a modem block of a reader or provided to the modem block by higher layers of the reader. Tags meeting the selection criteria are reported to the higher layers for further actions. Some tags may be held while waiting for instructions from the higher layer block(s).
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: April 10, 2012
    Assignee: Impinj, Inc.
    Inventors: Ali Aiouaz, Paul Dietrich, Christopher J. Diorio, Scott A. Cooper
  • Patent number: 8120494
    Abstract: RFID readers, reader systems, and methods are provided that utilize smart antenna switching. A first signal is transmitted from a first antenna estimating presence of tags within the antennas field of view. If fewer than a predefined number of tags are estimated, the system switches to a second antenna. Otherwise, the tags found in the field of view of the first antenna are inventoried before switching to the second antenna.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: February 21, 2012
    Assignee: Impinj, Inc.
    Inventors: Ali Aiouaz, Paul Dietrich, David Ord, Omar Khwaja
  • Patent number: 8115590
    Abstract: RFID reader and methods of operating an RFID reader are provided to limit or prevent the issuing of confidential information such as encryption keys, passwords, shared secrets, and the like to RFID tags if a reader is not authorized. The reader may determine its authorization status based on a self-check, information from another reader, or information from a controller, and limit an operational aspect of itself or for communication with the tags.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: February 14, 2012
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Joel Peshkin, Ali Aiouaz, Scott Cooper