Abstract: A novel non-uniform sampling technique for a burst type signal. The analog signal is digitized with high sampling rate to maintain harmonics at higher frequencies and consequently the integrity of the analog signal. Then by using non-uniform sampling technique the most significant samples are selected for further processing which results in overall cost and power consumption reduction.

Abstract: This application discloses an implementation of a novel non-uniform sampling technique for a burst type signal. A simple circuit is developed that implements an analog computation of a complex digital calculation to skip the unnecessary samples and choose the optimum next sample. Then the optimum samples are selected for further processing which results in overall cost and power consumption reduction.

Abstract: A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks. Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.

Abstract: A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks. Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.

Abstract: A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.

Abstract: A quadrature modulator and a method of calibrating same by applying a first test tone signal to an in-phase modulation branch input of the modulator and a ninety degree phase-shifted version of the first test tone signal to a quadrature modulation branch input of the modulator. The carrier leakage level in an output signal of the modulator is measured and in response base band dc offset voltages are adjusted to minimize the carrier leakage. A second test tone signal is applied to the in-phase modulation branch input and a ninety degree phase-shifted version of the second test tone signal to the quadrature modulation branch input. The level of an undesired upper sideband frequency component in the output signal is measured and in response base band gains the in-phase and quadrature modulation branches and a local oscillator phase error are adjusted to minimize the undesired side band.

Abstract: A quadrature modulator and a method of calibrating same by applying a first test tone signal to an in-phase modulation branch input of the modulator and a ninety degree phase-shifted version of the first test tone signal to a quadrature modulation branch input of the modulator. The carrier leakage level in an output signal of the modulator is measured and in response base band dc offset voltages are adjusted to minimize the carrier leakage. A second test tone signal is applied to the in-phase modulation branch input and a ninety degree phase-shifted version of the second test tone signal to the quadrature modulation branch input. The level of an undesired upper sideband frequency component in the output signal is measured and in response base band gains the in-phase and quadrature modulation branches and a local oscillator phase error are adjusted to minimize the undesired side band.

Abstract: A quadrature modulator and a method of calibrating same by applying a first test tone signal to an in-phase modulation branch input of the modulator and a ninety degree phase-shifted version of the first test tone signal to a quadrature modulation branch input of the modulator. The carrier leakage level in an output signal of the modulator is measured and in response base band dc offset voltages are adjusted to minimize the carrier leakage. A second test tone signal is applied to the in-phase modulation branch input and a ninety degree phase-shifted version of the second test tone signal to the quadrature modulation branch input. The level of an undesired upper sideband frequency component in the output signal is measured and in response base band gains the in-phase and quadrature modulation branches and a local oscillator phase error are adjusted to minimize the undesired sideband.

Abstract: One embodiment of the present invention includes a first memory, an address counter, and an adder. The first memory having KN locations stores K sums of mixer samples during an epoch interval. The mixer samples are generated at a first clock frequency from a mixer for N channels corresponding to N satellites in a global positioning system (GPS) receiver. The address counter generates an address modulo-KN corresponding to a first location in the memory at the first clock frequency. The adder adds one of the mixer samples to contents of the first location to generate a sum. The sum is written into the first location.

Abstract: A quadrature modulator and a method of calibrating same by applying a first test tone signal to an in-phase modulation branch input of the modulator and a ninety degree phase-shifted version of the first test tone signal to a quadrature modulation branch input of the modulator. The carrier leakage level in an output signal of the modulator is measured and in response base band dc offset voltages are adjusted to minimize the carrier leakage. A second test tone signal is applied to the in-phase modulation branch input and a ninety degree phase-shifted version of the second test tone signal to the quadrature modulation branch input. The level of an undesired upper sideband frequency component in the output signal is measured and in response base band gains the in-phase and quadrature modulation branches and a local oscillator phase error are adjusted to minimize the undesired sideband.

Abstract: One embodiment of the present invention includes a first memory, an address counter, and an adder. The first memory having KN locations stores K sums of mixer samples during an epoch interval. The mixer samples are generated at a first clock frequency from a mixer for N channels corresponding to N satellites in a global positioning system (GPS) receiver. The address counter generates an address modulo-KN corresponding to a first location in the memory at the first clock frequency. The adder adds one of the mixer samples to contents of the first location to generate a sum. The sum is written into the first location.

Abstract: An RF mixer utilizing frequency and bias compensation for improved performance characteristics. The RF mixer receives bias signals that are dependent on V.sub.CC levels to internally balance the local oscillation received and mix the perfectly bias balanced internally generated oscillation signal with the RF input.

Abstract: A method and a circuit for self-calibration and testing QPSK transmitter/receiver IC's is provided. The method and circuit enable variable error parameters such as gain mismatch, offset voltages, and phase errors inherent in the circuit and signals to be measured and taken into account by the digital signal processors for minimum bit error rates during cellular communications.

Abstract: A high-speed/high-slew-rate tri-modal all bipolar buffer/switch includes a unity-gain amplifier, a voltage source, and a maximum level detector and a minimum level detector adjusting a current source to sink or source current as required to quickly make the output voltage of the switch equal to the input voltage of the switch. The maximum level detector and the minimum level detector compare the output voltage to the input voltage. If the output voltage does not equal the input voltage, the current source acts as either a sink or source to make the output voltage equal the input voltage. In addition, the voltage switch holds a constant d.c. voltage at the output of the switch when the switch is powered down.

Abstract: Self-oscillation of a prescalar circuit is avoided by including offset generators on the inputs of the prescalar circuit. This ensures that when the transistors in one differential pair in the prescalar circuit transition from ON to OFF, the other differential pair of transistors will not transition. As a result, spikes are prevented in the differential pair that does not have a transition. A quadrature signal generator constructed with such a prescalar circuit provides an accurate output despite weak or non-existent input signals.

Abstract: A new addition to log amplifiers for received signal strength indication in cellular telephony and telecommunications applications extends the large signal end of the signal strength curve by adding rectifiers to the input of an intermediate frequency amplifier, without degrading the noise figure or impedance characteristics thereof. The new addition to log amplifier outputs a signal which is linearly related to an input signal to the log amplifier.

Abstract: A comparator has a simple high frequency signal path from input to output formed by two differentially connected transistors with an output transistor connected to each. A current control circuit maintains a constant total current flowing through the differentially connected transistors. The ratio of currents flowing through the differentially connected transistors is initially set by a control circuit, so that the output of the comparator is predictable when powered up. The control circuit then gradually releases control, so that there is a smooth transfer to control by a reference signal input to the comparator.

Abstract: An IF limiting amplifier uses localized positive feedback in each amplifier stage to provide additional small signal gain while maintaining the limiting gain. The extra small signal gain results in higher overall sensitivity for the receiver at less bias current. The reduction in the number of stages needed to perform the same signal response results in a significant decrease in power consumption by the circuit.

Abstract: An electronic circuit with a logarithmic detector performs the following operations: receiving an input voltage, generating a series of subsequently amplified versions of the input voltage, rectifying the versions, thereupon rescaling and converting the versions into currents, summing the currents and applying the summed current to a resistor. With regard to the prior art the order of rectification and rescaling has been interchanged. As a result, the design is simplified, the circuit's supply voltage is lower than that of the prior art, and the circuit is more accurate and easier to compensate for temperature dependence.

Abstract: An IF amplifier/log detector with a modular architecture includes a plurality of voltage amplifiers, a plurality of rectifiers, a plurality of voltage-to-current converters and a current summing circuit. Each amplifier has a first differential transistor pair driven by a first current proportional to the temperature to fix the gain. Each converter includes a second differential transistor pair driven by a current proportional to the temperature and inversely proportional to a process parameter, and a third differential transistor pair driven by a third current inversely proportional to the process parameter. In this manner a circuit having improved performance with variations in temperature and process parameters is obtained.