Abstract: A charge pump circuit including two transfer capacitors, two reservoir capacitors and a plurality of switches. The transfer capacitors are charged to Vin when the charge pump circuit is in a first operating state, the transfer capacitors are connected in a first series arrangement to apply a +2 Vin charge to one of the reservoir capacitors when the charge pump circuit is in a second operating state, and the transfer capacitors are connected in a second series arrangement to apply a -2 Vin charge to the other of the reservoir capacitors when the charge pump circuit is in a third operating state. A control circuit is provided to control the plurality of switches such that the charge pump circuit enters the first through third operating states is a predetermined sequence.

Abstract: A fixed and a user adjustable voltage reference is alternatively provided by an integrated switch which switches between two current sources according to an input voltage. A fixed reference voltage is achieved by amplifying the current of one of the two current sources according to a predetermined voltage difference between the output terminal and an internal reference voltage. An adjustable reference voltage is achieved by amplifying the current of other of the two current sources according to a voltage difference between the internal reference voltage and an user adjustable voltage. In one embodiment, the user adjustable voltage is achieved by a user adjustable voltage divider circuit.

Abstract: A digital to analog converter employs an operational amplifier as an active summing device for summing a first analog voltage corresponding to most significant bits of a digital value and a second analog voltage corresponding to least significant bits of the digital value. In a multi-channel application, a single MSB DAC can be shared by all channels through first MUXs in each channel with each channel having an independent LSB DAC. Alternatively, a single LSB DAC can be shared by all channels through second MUXs in each channel. Gain of the voltage summing operational amplifier in each channel is determined by values of a resistor connecting the output of the LSB DAC to the inverting negative input of the operational amplifier and of a feedback resistor connecting the amplifier output to the inverting negative input.

Abstract: A digital to analog converter (DAC) incorporates a novel subranging voltage output DAC that delivers high multiplying bandwidth while consuming low power and requires small silicon area. The higher order digital input bits (MSBS) select a voltage range (VMSB) from a first resistor divider DAC network. The VMSB is then applied to the input of a small high speed low power differential input single ended output LSB programmable attenuator amplifier. Transistor follower devices effectively buffer the MSB section to the LSB section and increase bandwidth and speed of operation as well as permitting multichannel sharing of a single precision MSB voltage divider network.

Abstract: A temperature insensitive voltage reference is described which can advantageously be implemented using standard CMOS processing techniques. A pair of parasitic bipolar transistors are coupled with appropriate resistors to produce a voltage with a temperature coefficient that is equal in value but of opposite polarity to a zener diode voltage-temperature coefficient. This voltage is then combined with a zener diode voltage to yield the desired output reference voltage.