Patents by Inventor Alice Boussagol

Alice Boussagol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9011598
    Abstract: The present invention provides methods for fabricating a composite substrate including a supporting substrate and a layer of a binary or ternary material having a crystal form that is non-cubic and semi-polar or non-polar. The methods comprise transferring the layer of a binary or ternary material from a donor substrate to a receiving substrate.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: April 21, 2015
    Assignee: Soitec
    Inventors: Alice Boussagol, Frédéric Dupont, Bruce Faure
  • Patent number: 8679942
    Abstract: Composite substrates are produced that include a strained III-nitride material seed layer on a support substrate. Methods of producing the composite substrate include developing a desired lattice strain in the III-nitride material to produce a lattice parameter substantially matching a lattice parameter of a device structure to be formed on the composite substrate. The III-nitride material may be formed with a Ga polarity or an N polarity. The desired lattice strain may be developed by forming a buffer layer between the III-nitride material and a growth substrate, implanting a dopant in the III-nitride material to modify its lattice parameter, or forming the III-nitride material with a coefficient of thermal expansion (CTE) on a growth substrate with a different CTE.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: March 25, 2014
    Assignee: Soitec
    Inventors: Fabrice Letertre, Jean-Marc Bethoux, Alice Boussagol
  • Patent number: 7939428
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving substrate and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: May 10, 2011
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, legal representative, Gisèle Rayssac, legal representative
  • Publication number: 20110039368
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving substrate and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.
    Type: Application
    Filed: October 28, 2010
    Publication date: February 17, 2011
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, Gisèle Rayssac
  • Patent number: 7839001
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 23, 2010
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, legal representative, Giséle Rayssac, legal representative
  • Publication number: 20100127353
    Abstract: Composite substrates are produced that include a strained III-nitride material seed layer on a support substrate. Methods of producing the composite substrate include developing a desired lattice strain in the III-nitride material to produce a lattice parameter substantially matching a lattice parameter of a device structure to be formed on the composite substrate. The III-nitride material may be formed with a Ga polarity or a N polarity. The desired lattice strain may be developed by forming a buffer layer between the III-nitride material and a growth substrate, implanting a dopant in the III-nitride material to modify its lattice parameter, or forming the III-nitride material with a coefficient of thermal expansion (CTE) on a growth substrate with a different CTE.
    Type: Application
    Filed: October 30, 2009
    Publication date: May 27, 2010
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.
    Inventors: Fabrice LETERTRE, Jean-Marc BETHOUX, Alice BOUSSAGOL
  • Publication number: 20090289332
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.
    Type: Application
    Filed: August 5, 2009
    Publication date: November 26, 2009
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, Gisele Rayssac
  • Patent number: 7615468
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.
    Type: Grant
    Filed: August 17, 2007
    Date of Patent: November 10, 2009
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, legal representative, Gisèle Rayssac, legal representative
  • Patent number: 7557324
    Abstract: A thermal spraying method and device that includes a device (1,2) which generates a flame and a device (3) which injects a powder into the flame. The flame-generating device (1,2) includes an end piece (1) out of which the flame is directed towards a substrate subjected to spraying. The powder-injection device (3) includes a frame element (6) that is adapted to be attached to the end piece (1) and to project in the flame ejection direction from the end piece (1). The frame element (6) has a plurality of through-holes (9) extending through it and distributed circumferentially about the frame element (6) as well as at least two powder injection ports distributed about the frame element (6).
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: July 7, 2009
    Assignee: Volvo Aero Corporation
    Inventors: Per Nylen, Alice Boussagol, Roger Svensson, Gabriel Mora, Mats-Olov Hansson, Jan Wigren, Jimmy Johansson
  • Patent number: 7514341
    Abstract: The invention relates to a process for the formation of a structure comprising a thin layer made of semiconductor material on a substrate, including the steps of providing a zone of weakness in a donor substrate; bonding the donor substrate to a support substrate; detaching a portion of the donor substrate to transfer it to the support substrate, wherein the detaching includes applying heat treating the donor substrate to weaken the zone of weakness without initiating detachment and applying an energy pulse to provoke self-maintained detachment of the donor substrate portion to transfer it to the support substrate; and subjecting the transferred portion of the donor substrate to a finishing operation to form a thin layer.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: April 7, 2009
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Eric Neyret, Alice Boussagol, Nadia Ben Mohamed
  • Patent number: 7326628
    Abstract: A method for producing a semiconductor structure by conducting controlled co-implanting of at least first and second different atomic species into a donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. Implantation energies are selected so that the first and second species are respectively distributed in the donor wafer according to a repartition profile that presents a spreading zone in which each species is mainly distributed at a maximum concentration peak. The implantation doses and energies of the first and second species are selected such that the second species is implanted deeper in the embrittlement zone than the first species spreading zone. The donor substrate is detached at the embrittlement zone to transfer the thin layer to the support substrate while minimizing blister formation in and surface roughness of the transferred layer.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: February 5, 2008
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Nadia Ben Mohamed, Nguyet-Phuong Nguyen, Takeshi Akatsu, Alice Boussagol, Gabriela Suciu
  • Publication number: 20070287273
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.
    Type: Application
    Filed: August 17, 2007
    Publication date: December 13, 2007
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, Gisele Rayssac
  • Patent number: 7256473
    Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600° K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: August 14, 2007
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruce Faure, Alice Boussagol
  • Publication number: 20070148910
    Abstract: The invention relates to a process for the formation of a structure comprising a thin layer made of semiconductor material on a substrate, including the steps of providing a zone of weakness in a donor substrate; bonding the donor substrate to a support substrate; detaching a portion of the donor substrate to transfer it to the support substrate, wherein the detaching includes applying heat treating the donor substrate to weaken the zone of weakness without initiating detachment and applying an energy pulse to provoke self-maintained detachment of the donor substrate portion to transfer it to the support substrate; and subjecting the transferred portion of the donor substrate to a finishing operation to form a thin layer.
    Type: Application
    Filed: February 16, 2006
    Publication date: June 28, 2007
    Inventors: Eric Neyret, Alice Boussagol, Nadia Ben Mohamed
  • Publication number: 20070141803
    Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support.
    Type: Application
    Filed: August 16, 2006
    Publication date: June 21, 2007
    Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen
  • Publication number: 20070022940
    Abstract: The present invention provides methods for fabricating a composite substrate including a supporting substrate and a layer of a binary or ternary material having a crystal form that is non-cubic and semi-polar or non-polar. The methods comprise transferring the layer of a binary or ternary material from a donor substrate to a receiving substrate.
    Type: Application
    Filed: September 28, 2006
    Publication date: February 1, 2007
    Inventors: Alice Boussagol, Frederic Dupont, Bruce Faure
  • Publication number: 20060284252
    Abstract: The invention relates to structures useful for the manufacture of electronic components, which comprise a substrate, a strain holding layer, and a layer of a strained semiconducting material. These structures are particularly useful where islands are later formed in the strained semiconducting material because the strain holding layer limits relaxation of stress in the islands. This invention also relates to processes for making a these structures.
    Type: Application
    Filed: August 29, 2005
    Publication date: December 21, 2006
    Inventors: Alice Boussagol, Ian Cayrefourcq
  • Patent number: 7135383
    Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600° K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: November 14, 2006
    Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.
    Inventors: Bruce Faure, Alice Boussagol
  • Publication number: 20060091400
    Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600°°K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 4, 2006
    Inventors: Bruce Faure, Alice Boussagol
  • Publication number: 20060060943
    Abstract: The invention relates to a method for producing a semiconductor structure which comprises conducting controlled co-implanting of at least first and second different atomic species into a face of donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. This step is conducted by selecting implantation energies so that the coimplanting is made under conditions such that the first and second species are respectively distributed in the donor wafer according to a repartition profile that presents a spreading zone in which each species is mainly distributed and at a maximum concentration peak.
    Type: Application
    Filed: July 13, 2005
    Publication date: March 23, 2006
    Inventors: Nadia Ben Mohamed, Nguyet-Phuong Nguyen, Takeshi Akatsu, Alice Boussagol, Gabriela Suciu