Patents by Inventor Alice Boussagol
Alice Boussagol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9011598Abstract: The present invention provides methods for fabricating a composite substrate including a supporting substrate and a layer of a binary or ternary material having a crystal form that is non-cubic and semi-polar or non-polar. The methods comprise transferring the layer of a binary or ternary material from a donor substrate to a receiving substrate.Type: GrantFiled: September 28, 2006Date of Patent: April 21, 2015Assignee: SoitecInventors: Alice Boussagol, Frédéric Dupont, Bruce Faure
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Patent number: 8679942Abstract: Composite substrates are produced that include a strained III-nitride material seed layer on a support substrate. Methods of producing the composite substrate include developing a desired lattice strain in the III-nitride material to produce a lattice parameter substantially matching a lattice parameter of a device structure to be formed on the composite substrate. The III-nitride material may be formed with a Ga polarity or an N polarity. The desired lattice strain may be developed by forming a buffer layer between the III-nitride material and a growth substrate, implanting a dopant in the III-nitride material to modify its lattice parameter, or forming the III-nitride material with a coefficient of thermal expansion (CTE) on a growth substrate with a different CTE.Type: GrantFiled: October 30, 2009Date of Patent: March 25, 2014Assignee: SoitecInventors: Fabrice Letertre, Jean-Marc Bethoux, Alice Boussagol
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Patent number: 7939428Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving substrate and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.Type: GrantFiled: October 28, 2010Date of Patent: May 10, 2011Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, legal representative, Gisèle Rayssac, legal representative
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Publication number: 20110039368Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving substrate and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.Type: ApplicationFiled: October 28, 2010Publication date: February 17, 2011Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, Gisèle Rayssac
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Patent number: 7839001Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.Type: GrantFiled: August 5, 2009Date of Patent: November 23, 2010Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, legal representative, Giséle Rayssac, legal representative
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Publication number: 20100127353Abstract: Composite substrates are produced that include a strained III-nitride material seed layer on a support substrate. Methods of producing the composite substrate include developing a desired lattice strain in the III-nitride material to produce a lattice parameter substantially matching a lattice parameter of a device structure to be formed on the composite substrate. The III-nitride material may be formed with a Ga polarity or a N polarity. The desired lattice strain may be developed by forming a buffer layer between the III-nitride material and a growth substrate, implanting a dopant in the III-nitride material to modify its lattice parameter, or forming the III-nitride material with a coefficient of thermal expansion (CTE) on a growth substrate with a different CTE.Type: ApplicationFiled: October 30, 2009Publication date: May 27, 2010Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.Inventors: Fabrice LETERTRE, Jean-Marc BETHOUX, Alice BOUSSAGOL
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Publication number: 20090289332Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.Type: ApplicationFiled: August 5, 2009Publication date: November 26, 2009Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, Gisele Rayssac
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Patent number: 7615468Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.Type: GrantFiled: August 17, 2007Date of Patent: November 10, 2009Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, legal representative, Gisèle Rayssac, legal representative
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Patent number: 7557324Abstract: A thermal spraying method and device that includes a device (1,2) which generates a flame and a device (3) which injects a powder into the flame. The flame-generating device (1,2) includes an end piece (1) out of which the flame is directed towards a substrate subjected to spraying. The powder-injection device (3) includes a frame element (6) that is adapted to be attached to the end piece (1) and to project in the flame ejection direction from the end piece (1). The frame element (6) has a plurality of through-holes (9) extending through it and distributed circumferentially about the frame element (6) as well as at least two powder injection ports distributed about the frame element (6).Type: GrantFiled: September 18, 2003Date of Patent: July 7, 2009Assignee: Volvo Aero CorporationInventors: Per Nylen, Alice Boussagol, Roger Svensson, Gabriel Mora, Mats-Olov Hansson, Jan Wigren, Jimmy Johansson
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Patent number: 7514341Abstract: The invention relates to a process for the formation of a structure comprising a thin layer made of semiconductor material on a substrate, including the steps of providing a zone of weakness in a donor substrate; bonding the donor substrate to a support substrate; detaching a portion of the donor substrate to transfer it to the support substrate, wherein the detaching includes applying heat treating the donor substrate to weaken the zone of weakness without initiating detachment and applying an energy pulse to provoke self-maintained detachment of the donor substrate portion to transfer it to the support substrate; and subjecting the transferred portion of the donor substrate to a finishing operation to form a thin layer.Type: GrantFiled: February 16, 2006Date of Patent: April 7, 2009Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Eric Neyret, Alice Boussagol, Nadia Ben Mohamed
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Patent number: 7326628Abstract: A method for producing a semiconductor structure by conducting controlled co-implanting of at least first and second different atomic species into a donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. Implantation energies are selected so that the first and second species are respectively distributed in the donor wafer according to a repartition profile that presents a spreading zone in which each species is mainly distributed at a maximum concentration peak. The implantation doses and energies of the first and second species are selected such that the second species is implanted deeper in the embrittlement zone than the first species spreading zone. The donor substrate is detached at the embrittlement zone to transfer the thin layer to the support substrate while minimizing blister formation in and surface roughness of the transferred layer.Type: GrantFiled: July 13, 2005Date of Patent: February 5, 2008Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Nadia Ben Mohamed, Nguyet-Phuong Nguyen, Takeshi Akatsu, Alice Boussagol, Gabriela Suciu
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Publication number: 20070287273Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support. Preferably, the nucleation layer and the intermediate support have substantially the same chemical composition.Type: ApplicationFiled: August 17, 2007Publication date: December 13, 2007Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen, Fabrice Letertre, Olivier Rayssac, Pierre Rayssac, Gisele Rayssac
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Patent number: 7256473Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600° K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.Type: GrantFiled: October 6, 2006Date of Patent: August 14, 2007Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Bruce Faure, Alice Boussagol
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Publication number: 20070148910Abstract: The invention relates to a process for the formation of a structure comprising a thin layer made of semiconductor material on a substrate, including the steps of providing a zone of weakness in a donor substrate; bonding the donor substrate to a support substrate; detaching a portion of the donor substrate to transfer it to the support substrate, wherein the detaching includes applying heat treating the donor substrate to weaken the zone of weakness without initiating detachment and applying an energy pulse to provoke self-maintained detachment of the donor substrate portion to transfer it to the support substrate; and subjecting the transferred portion of the donor substrate to a finishing operation to form a thin layer.Type: ApplicationFiled: February 16, 2006Publication date: June 28, 2007Inventors: Eric Neyret, Alice Boussagol, Nadia Ben Mohamed
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Publication number: 20070141803Abstract: A method for making substrates for use in optics, electronics, or opto-electronics. The method may include transferring a seed layer onto a receiving support and depositing a useful layer onto the seed layer. The thermal expansion coefficient of the receiving support may be identical to or slightly larger than the thermal expansion coefficient of the useful layer and the thermal expansion coefficient of the seed layer may be substantially equal to the thermal expansion coefficient of the receiving support.Type: ApplicationFiled: August 16, 2006Publication date: June 21, 2007Inventors: Alice Boussagol, Bruce Faure, Bruno Ghyselen
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Publication number: 20070022940Abstract: The present invention provides methods for fabricating a composite substrate including a supporting substrate and a layer of a binary or ternary material having a crystal form that is non-cubic and semi-polar or non-polar. The methods comprise transferring the layer of a binary or ternary material from a donor substrate to a receiving substrate.Type: ApplicationFiled: September 28, 2006Publication date: February 1, 2007Inventors: Alice Boussagol, Frederic Dupont, Bruce Faure
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Publication number: 20060284252Abstract: The invention relates to structures useful for the manufacture of electronic components, which comprise a substrate, a strain holding layer, and a layer of a strained semiconducting material. These structures are particularly useful where islands are later formed in the strained semiconducting material because the strain holding layer limits relaxation of stress in the islands. This invention also relates to processes for making a these structures.Type: ApplicationFiled: August 29, 2005Publication date: December 21, 2006Inventors: Alice Boussagol, Ian Cayrefourcq
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Patent number: 7135383Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600° K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.Type: GrantFiled: December 21, 2004Date of Patent: November 14, 2006Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.Inventors: Bruce Faure, Alice Boussagol
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Publication number: 20060091400Abstract: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each layer are chosen such that the thermal impedance between ambient temperature and 600°°K of the composite structure is a value that is no greater than about 1.3 times the thermal impedance of a monocrystalline bulk SiC wafer having the same dimensions as the composite structure. The composite structure provides sufficient heat dissipation properties for manufacturing optical, electronic, or optoelectronic components.Type: ApplicationFiled: December 21, 2004Publication date: May 4, 2006Inventors: Bruce Faure, Alice Boussagol
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Publication number: 20060060943Abstract: The invention relates to a method for producing a semiconductor structure which comprises conducting controlled co-implanting of at least first and second different atomic species into a face of donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. This step is conducted by selecting implantation energies so that the coimplanting is made under conditions such that the first and second species are respectively distributed in the donor wafer according to a repartition profile that presents a spreading zone in which each species is mainly distributed and at a maximum concentration peak.Type: ApplicationFiled: July 13, 2005Publication date: March 23, 2006Inventors: Nadia Ben Mohamed, Nguyet-Phuong Nguyen, Takeshi Akatsu, Alice Boussagol, Gabriela Suciu