Patents by Inventor Allen W. Hanson
Allen W. Hanson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9608102Abstract: Gallium nitride material devices and methods associated with the same. In some embodiments, the devices may be transistors which include a conductive structure connected to a source electrode. The conductive structure may form a source field plate which can be formed over a dielectric material and can extend in the direction of the gate electrode of the transistor. The source field plate may reduce the electrical field (e.g., peak electrical field and/or integrated electrical field) in the region of the device between the gate electrode and the drain electrode which can lead to a number of advantages including reduced gate-drain feedback capacitance, reduced surface electron concentration, increased breakdown voltage, and improved device reliability. These advantages enable the gallium nitride material transistors to operate at high drain efficiencies and/or high output powers. The devices can be used in RF power applications, amongst others.Type: GrantFiled: November 30, 2006Date of Patent: March 28, 2017Assignee: Infineon Technologies Americas Corp.Inventors: Jerry Wayne Johnson, Sameer Singhal, Allen W. Hanson, Robert Joseph Therrien
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Publication number: 20170069500Abstract: III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.Type: ApplicationFiled: September 8, 2015Publication date: March 9, 2017Applicant: M/A-COM Technology Solutions Holdings, Inc.Inventors: John Claassen Roberts, Kevin J. Linthicum, Allen W. Hanson
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Publication number: 20170069713Abstract: III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.Type: ApplicationFiled: September 8, 2015Publication date: March 9, 2017Applicant: M/A-COM Technology Solutions Holdings, Inc.Inventors: John Claassen Roberts, Kevin J. Linthicum, Allen W. Hanson, James W. Cook, JR.
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Publication number: 20170069746Abstract: III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.Type: ApplicationFiled: September 8, 2015Publication date: March 9, 2017Applicant: M/A-COM Technology Solutions Holdings, Inc.Inventors: John Claassen Roberts, Kevin J. Linthicum, Allen W. Hanson
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Publication number: 20160322457Abstract: An apparatus comprising a channel layer, a first layer, a hole barrier layer and a second layer is disclosed. The channel layer may be configured to carry a drain current in response to a voltage at a gate node. The first layer may be between the channel layer and the gate node. The first layer generally has a first bandgap. The hole barrier layer may be in contact with the first layer. The hole barrier layer generally has a second bandgap that (i) forms a valance band offset relative to the first bandgap and (ii) is configured to impede holes generated in one or more of the channel layer and the first layer from reaching the gate node. The gate node may be in contact with the second layer. The apparatus generally comprises a field effect transistor.Type: ApplicationFiled: April 30, 2015Publication date: November 3, 2016Inventors: Allen W. Hanson, Gabriel R. Cueva, Wayne M. Struble, Yan Zhang
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Patent number: 9318417Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: January 30, 2015Date of Patent: April 19, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Robert Joseph Therrien, Jerry Wayne Johnson, Allen W. Hanson
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Publication number: 20150137141Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: ApplicationFiled: January 30, 2015Publication date: May 21, 2015Inventors: Robert Joseph Therrien, Jerry Wayne Johnson, Allen W. Hanson
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Patent number: 8946765Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: March 21, 2014Date of Patent: February 3, 2015Assignee: International Rectifier CorporationInventors: Robert Joseph Therrien, Jerry Wayne Johnson, Allen W. Hanson
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Patent number: 8859400Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: December 28, 2012Date of Patent: October 14, 2014Assignee: International Rectifier CorporationInventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Publication number: 20140203294Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: ApplicationFiled: March 21, 2014Publication date: July 24, 2014Applicant: International Rectifier CorporationInventors: Robert Joseph Therrien, Jerry Wayne Johnson, Allen W. Hanson
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Patent number: 8680570Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: January 4, 2013Date of Patent: March 25, 2014Assignee: International Rectifier CorporationInventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Patent number: 8350288Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., PET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: November 22, 2011Date of Patent: January 8, 2013Assignee: International Rectifier CorporationInventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Patent number: 8343856Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: November 22, 2011Date of Patent: January 1, 2013Assignee: International Rectifier CorporationInventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Patent number: 8288253Abstract: A process for fabricating a semiconductor device. The process including (a) growing a channel layer on a buffer layer, (b) growing a barrier layer on the channel layer, (c) epitaxially growing a quaternary etch-stop layer on the barrier layer, (d) growing a first contact layer on the quaternary etch-stop layer, (e) growing a second contact layer on the first contact layer, (f) etching portions of the second contact layer to reveal a first recess surface, and (g) etching portions of the first contact layer to reveal a second recess surface. The second contact layer may be a highly doped contact layer. The second recess surface generally forms a gate region. The first and the second contact layers have a first etch rate and the quaternary etch-stop layer has a second etch rate in a chosen first etch chemistry.Type: GrantFiled: June 30, 2011Date of Patent: October 16, 2012Assignee: M/A-COM Technology Solutions Holdings, Inc.Inventors: Allen W. Hanson, Anthony Kaleta
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Patent number: 8288260Abstract: A process for fabricating a semiconductor device. The process includes (a) growing an n-channel layer of gallium arsenide (GaAs) on a buffer layer, (b) growing a barrier layer on the re-channel layer, (c) epitaxially growing a first etch-stop layer on the barrier layer, (d) growing a first contact layer of wide band-gap material on the first etch-stop layer, (e) epitaxially growing a second etch-stop layer on the first contact layer, (f) growing a second contact layer on the second etch-stop layer, where the second contact layer is a highly doped material, and (g) selectively etching portions of the first contact layer, the second etch-stop layer, and the second contact layer to form a gate region.Type: GrantFiled: June 30, 2011Date of Patent: October 16, 2012Assignee: M/A-COM Technology Solutions Holdings, Inc.Inventor: Allen W. Hanson
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Publication number: 20120070967Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: ApplicationFiled: November 22, 2011Publication date: March 22, 2012Inventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Publication number: 20120068190Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., PET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: ApplicationFiled: November 22, 2011Publication date: March 22, 2012Inventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Patent number: 8067786Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.Type: GrantFiled: July 24, 2009Date of Patent: November 29, 2011Assignee: International Rectifier CorporationInventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
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Patent number: 8026581Abstract: Gallium nitride material structures are provided, as well as devices and methods associated with such structures. The structures include a diamond region which may facilitate conduction and removal of heat generated within the gallium nitride material during device operation. The structures described herein may form the basis of a number of semiconductor devices and, in particular, transistors (e.g., FETs).Type: GrantFiled: February 5, 2008Date of Patent: September 27, 2011Assignee: International Rectifier CorporationInventors: Allen W. Hanson, Edwin Lanier Piner
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Patent number: 7994540Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.Type: GrantFiled: July 24, 2009Date of Patent: August 9, 2011Assignee: International Rectifier CorporationInventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Jr., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan