Patents by Inventor Alois Stelzl

Alois Stelzl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11245977
    Abstract: The invention relates to a simple to produce electric component for chips with sensitive component structures. Said component comprises a connection structure and a switching structure on the underside of the chip and a support substrate with at least one polymer layer.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: February 8, 2022
    Assignee: Snaptrack, Inc.
    Inventors: Christian Bauer, Hans Krüger, Jürgen Portmann, Alois Stelzl, Wolfgang Pahl
  • Patent number: 10164166
    Abstract: A MEMS component includes, on a substrate, component structures, contact areas connected to the component structures, metallic column structures seated on the contact areas, and metallic frame structures surrounding the component structures. A cured resist layer is seated on frame structure and column structures such that a cavity is enclosed between substrate, frame structure and resist layer. A structured metallization is provided directly on the resist layer or on a carrier layer seated on the resist layer. The structured metallization includes at least external contacts of the component and being electrically conductively connected both to metallic structures and to the contact areas of the component structures.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: December 25, 2018
    Assignee: SnapTrack, Inc.
    Inventors: Hans Krüger, Alois Stelzl, Christian Bauer, Jürgen Portmann, Wolfgang Pahl
  • Publication number: 20180097172
    Abstract: A MEMS component includes, on a substrate, component structures, contact areas connected to the component structures, metallic column structures seated on the contact areas, and metallic frame structures surrounding the component structures. A cured resist layer is seated on frame structure and column structures such that a cavity is enclosed between substrate, frame structure and resist layer. A structured metallization is provided directly on the resist layer or on a carrier layer seated on the resist layer. The structured metallization includes at least external contacts of the component and being electrically conductively connected both to metallic structures and to the contact areas of the component structures.
    Type: Application
    Filed: November 22, 2017
    Publication date: April 5, 2018
    Inventors: Hans KRÜGER, Alois STELZL, Christian BAUER, Jürgen PORTMANN, Wolfgang PAHL
  • Patent number: 9853204
    Abstract: A MEMS component includes, on a substrate, component structures, contact areas connected to the component structures, metallic column structures seated on the contact areas, and metallic frame structures surrounding the component structures. A cured resist layer is seated on frame structure and column structures such that a cavity is enclosed between substrate, frame structure and resist layer. A structured metallization is provided directly on the resist layer or on a carrier layer seated on the resist layer. The structured metallization includes at least external contacts of the component and being electrically conductively connected both to metallic structures and to the contact areas of the component structures.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: December 26, 2017
    Assignee: SnapTrack, Inc.
    Inventors: Hans Krüger, Alois Stelzl, Christian Bauer, Jürgen Portmann, Wolfgang Pahl
  • Publication number: 20170272855
    Abstract: The invention relates to a simple to produce electric component for chips with sensitive component structures. Said component comprises a connection structure and a switching structure on the underside of the chip and a support substrate with at least one polymer layer.
    Type: Application
    Filed: October 19, 2015
    Publication date: September 21, 2017
    Inventors: Christian BAUER, Hans KRÜEGER, Jürgen PORTMANN, Alois STELZL, Wolfgang PAHL
  • Patent number: 9647196
    Abstract: A hermetic wafer-level package composed of two piezoelectric wafers, preferably identical in terms of material, and a production method therefor are presented. The electrical and mechanical connection between the two wafers is accomplished with frame structures and pillars, the partial structures of which, distributed between two wafers, are wafer-bonded with the aid of connecting layers.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: May 9, 2017
    Assignee: SNAPTRACK, INC.
    Inventors: Christian Bauer, Hans Krueger, Juergen Portmann, Alois Stelzl, Wolfgang Pahl, Robert Koch
  • Patent number: 9382110
    Abstract: A component includes a substrate, a chip and a frame. The frame is bonded to the substrate and the chip rests on the frame. A sealing layer on parts of the frame and the chip is designed to hermetically seal a volume enclosed by the substrate, the chip and the metal frame.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: July 5, 2016
    Assignee: EPCOS AG
    Inventors: Christian Bauer, Hans Krueger, Juergen Portmann, Alois Stelzl
  • Publication number: 20150325780
    Abstract: A MEMS component includes, on a substrate, component structures, contact areas connected to the component structures, metallic column structures seated on the contact areas, and metallic frame structures surrounding the component structures. A cured resist layer is seated on frame structure and column structures such that a cavity is enclosed between substrate, frame structure and resist layer. A structured metallization is provided directly on the resist layer or on a carrier layer seated on the resist layer. The structured metallization includes at least external contacts of the component and being electrically conductively connected both to metallic structures and to the contact areas of the component structures.
    Type: Application
    Filed: October 14, 2013
    Publication date: November 12, 2015
    Inventors: Hans Krüger, Alois Stelzl, Christian Bauer, Jürgen Portmann, Wolfgang Pahl
  • Patent number: 9165905
    Abstract: A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: October 20, 2015
    Assignee: EPCOS AG
    Inventors: Hans Krueger, Alexander Schmajew, Alois Stelzl
  • Patent number: 9114979
    Abstract: A chip device is produced providing at least one wafer having a plurality of chip components. The wafer or wafers are separated into the individual chip components and/or into groups of chip components. The individual chip components and/or the groups of chip components are applied to a carrier element, in such a way that interspaces having a predetermined width are formed between the individual chip components and/or the groups of chip components. A polymer is introduced into the interspaces in order to form a composite element composed of the chip components and a polymer matrix. The composite element is separated in such a way that chip devices composed of in each case one of the chip components and at least one section of the polymer matrix are formed. The invention furthermore relates to a chip device produced by means of the method.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: August 25, 2015
    Assignee: EPCOS AG
    Inventors: Michael Gerner, Hans Krueger, Alois Stelzl
  • Patent number: 9006868
    Abstract: The invention relates to a component and a method for producing said component. The component comprises a substrate (S), a chip (CH), a frame (MF), which is connected to the substrate (S) and on which the chip (CH) bears. A metallic closure layer (ML) encompasses the frame (MF), the substrate (S) and the chip (CH) such that a volume enclosed by the substrate (S), the chip (CH) and the frame (MF) is hermetically sealed.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: April 14, 2015
    Assignee: EPCOS AG
    Inventors: Christian Bauer, Hans Krüger, Jürgen Portmann, Alois Stelzl
  • Patent number: 8865499
    Abstract: The invention relates to a method for producing a microphone, in which a transducer element (WE) is mounted on a carrier (TR); a cover is arranged over the transducer element (WE) and the carrier (TR) such that the transducer element (WE) is enclosed between the cover and the carrier (TR); a first sound inlet opening (S01) is produced in the carrier (TR); a functional test of the microphone is carried out; the first sound inlet opening (S01) is closed; and a second sound inlet opening (S02) is created in the cover. The present invention further relates to a microphone resulting from the method, in which the first sound inlet opening (S01) is prepared but closed.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 21, 2014
    Assignee: Epcos AG
    Inventors: Wolfgang Pahl, Hans Krueger, Gregor Feiertag, Alois Stelzl, Anton Leidl, Stefan Seitz
  • Publication number: 20140226285
    Abstract: A component includes a substrate, a chip, and a frame. The frame, the substrate, and the chip enclose a volume. A metal sealing layer is provided which is designed to hermetically seal the volume. The metal sealing layer has a hardened liquid metal or a hardened liquid metal alloy.
    Type: Application
    Filed: August 10, 2012
    Publication date: August 14, 2014
    Applicant: EPCOS AG
    Inventors: Christian Bauer, Hans Krueger, Juergen Portmann, Alois Stelzl, Alexander Schmajew
  • Patent number: 8759677
    Abstract: Frames (3) applied on a wafer (1) are leveled and covered with a covering film, such that gas-tight housings are formed for component structures (5), in particular for filter or MEMS structures. Inner columns (4) can be provided for supporting the housing and for the ground connection; outer columns (4) can be provided for the electrical connection and are connected to the component structures by means of conductor tracks (6) that are electrically insulated from the frames (3).
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: June 24, 2014
    Assignee: Epcos AG
    Inventors: Christian Bauer, Hans Krueger, Juergen Portmann, Alois Stelzl
  • Publication number: 20140111062
    Abstract: A hermetic wafer-level package composed of two piezoelectric wafers, preferably identical in terms of material, and a production method therefor are presented. The electrical and mechanical connection between the two wafers is accomplished with frame structures and pillars, the partial structures of which, distributed between two wafers, are wafer-bonded with the aid of connecting layers.
    Type: Application
    Filed: March 28, 2012
    Publication date: April 24, 2014
    Applicant: EPCOS AG
    Inventors: Christian Bauer, Hans Krueger, Juergen Portmann, Alois Stelzl, Wolfgang Pahl, Robert Koch
  • Patent number: 8691369
    Abstract: A layer combination with a marking is proposed, for example, for a miniaturized electrical component. The layer combination includes a first layer and a different release layer, which is applied on it, on which a pattern is formed by a released pattern-like area. The release area is formed from an inorganic, semiconducting, insulating material, where the pattern produced thereon is machine-readable.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: April 8, 2014
    Assignee: EPCOS AG
    Inventors: Alexander Schmajew, Hans Krueger, Alois Stelzl
  • Publication number: 20130341773
    Abstract: The invention relates to a component and a method for producing said component. The component comprises a substrate (S), a chip (CH), a frame (MF), which is connected to the substrate (S) and on which the chip (CH) bears. A metallic closure layer (ML) encompasses the frame (MF), the substrate (S) and the chip (CH) such that a volume enclosed by the substrate (S), the chip (CH) and the frame (MF) is hermetically sealed.
    Type: Application
    Filed: November 18, 2011
    Publication date: December 26, 2013
    Applicant: EPCOS AG
    Inventors: Christian Bauer, Hans Krüger, Jürgen Portmann, Alois Stelzl
  • Patent number: 8580613
    Abstract: On a carrier (1) an adhesion layer (4), an ASIC chip (2) and a sensor chip (3) are arranged one above another. An interchip connection (5) is provided for electrically connecting the chips among one another, and an ASIC connection (6) is provided for externally electrically connecting the circuit integrated in the ASIC chip.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: November 12, 2013
    Assignee: Epcos AG
    Inventors: Gregor Feiertag, Hans Krueger, Anton Leidl, Alois Stelzl
  • Publication number: 20130214405
    Abstract: A component includes a substrate, a chip and a frame. The frame is bonded to the substrate and the chip rests on the frame. A sealing layer on parts of the frame and the chip is designed to hermetically seal a volume enclosed by the substrate, the chip and the metal frame.
    Type: Application
    Filed: July 29, 2011
    Publication date: August 22, 2013
    Applicant: EPCOS AG
    Inventors: Christian Bauer, Hans Krueger, Juergen Portmann, Alois Stelzl
  • Publication number: 20130140656
    Abstract: The invention relates to a method for producing a microphone, in which a transducer element (WE) is mounted on a carrier (TR); a cover is arranged over the transducer element (WE) and the carrier (TR) such that the transducer element (WE) is enclosed between the cover and the carrier (TR); a first sound inlet opening (SO1) is produced in the carrier (TR); a functional test of the microphone is carried out; the first sound inlet opening (SO1) is closed; and a second sound inlet opening (SO2) is created in the cover. The present invention further relates to a microphone resulting from the method, in which the first sound inlet opening (SO1) is prepared but closed.
    Type: Application
    Filed: July 7, 2011
    Publication date: June 6, 2013
    Applicant: EPCOS AG
    Inventors: Wolfgang Pahl, Hans Krueger, Gregor Feiertag, Alois Stelzl, Anton Leidl, Stefan Seitz