Patents by Inventor Alok Gupta

Alok Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5715262
    Abstract: A Reed-Solomon decoder and a decoding algorithm executed by the decoder are disclosed. The decoder includes a syndrome computer and a syndrome processor. The syndrome computer is a pipelined functional unit for computing syndromes from a received codeword and storing erasure location members as flagged by an Erasure Flag signal. The syndrome processor includes a pipelined functional unit and a Chien search circuit for receiving from said syndrome computer the computed syndromes, erasure locations, and number of erasures and computing erasure locator polynomial, modified syndrome polynomial, error locator and error evaluator polynomials, error-erasure locator polynomial, and error value at an error location at each error location found by the Chien search circuit.
    Type: Grant
    Filed: July 12, 1995
    Date of Patent: February 3, 1998
    Assignee: LSI Logic Corporation
    Inventor: Alok Gupta
  • Patent number: 5544180
    Abstract: An improved technique for detecting a byte synchronization field encoded on a data storage drive. The technique correctly recovers the byte synchronization even if the byte is corrupted by a single burst error of as many as b bits. One preferred embodiment of an apparatus which implements the improved technique includes a data register for accepting a sequence of data bits from the data storage drive and a synchronization pattern register for storing a selected error-tolerant synchronization field sequence. The contents of the synchronization pattern register are compared with the contents of the data register, and a synchronization detector locates the synchronization field in the sequence of data bits. A number of improved byte synchronization sequences are provided, which yield improved error tolerance when employed in conjunction with the above scheme. A method for determining such improved byte synchronization sequences is also provided.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: August 6, 1996
    Assignee: QLogic Corporation
    Inventor: Alok Gupta
  • Patent number: 5313474
    Abstract: A system for determining the log of an element in Galois field GF(2.sup.m) using a small, selectable size table, a finite field multiplier, and a counter. The system allows for a flexible trade-off between speed and integrated circuit area, and applies for any GF(2.sup.m) for all possible m. The system allows for on-the-fly error location determination without the need for storing all possible logs for the GF(2.sup.m) under consideration.
    Type: Grant
    Filed: July 26, 1991
    Date of Patent: May 17, 1994
    Assignee: QLogic Corporation
    Inventor: Alok Gupta